6 Commits (7a04b4723bdf507129615b6899154a451e3cf951)

Author	SHA1	Message	Date
Lars-Peter Clausen	e1e0406a49	altera: axi_adxcvr: Reduce register map interface address width ... The axi_adxcvr register map only uses a single 4k page, make this explicit. This will allow for tighter packaging in the limited available total register map space. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>	2017-07-24 15:21:52 +02:00
Rejeesh Kutty	034aa7c1ee	altera 16.1- recommends using fpll for dedicated low skew clock routing	2017-06-08 10:50:52 -04:00
Rejeesh Kutty	c728299e71	altera- default to latest version	2017-05-12 13:25:17 -04:00
Rejeesh Kutty	73ebf1225c	axi_adxcvr- ip/phy split	2016-09-12 14:57:50 -04:00
Rejeesh Kutty	5544e3cf10	axi_adxcvr- compile fixes	2016-09-01 10:06:28 -04:00
Rejeesh Kutty	b7ea2efa87	altera- xcvr cores	2016-08-29 15:18:48 -04:00