Commit Graph

1767 Commits (7c142178dde868c10cce49963b226362b8bb5cad)

Author SHA1 Message Date
Rejeesh Kutty 7c142178dd daq2/a10gx- axi_jesd_xcvr sysref name changes 2015-07-15 15:59:52 -04:00
Rejeesh Kutty ffd767deb2 daq2/a10gx- axi_jesd_xcvr sysref name changes 2015-07-15 15:59:51 -04:00
Rejeesh Kutty 31584cf27e ad9680- qsys needs interface signal name matching 2015-07-15 15:59:51 -04:00
Rejeesh Kutty 60c344cea6 ad9144- qsys needs interface signal name matching 2015-07-15 15:59:51 -04:00
Rejeesh Kutty 6c0ad6ede8 daq3: bsplit/ccat -- removed 2015-07-15 13:05:53 -04:00
Rejeesh Kutty 29c6e90d38 util_bsplit: remove avalon streaming interface 2015-07-15 09:44:57 -04:00
Rejeesh Kutty af898de818 axi_jesd_xcvr: remove avalon streaming interface 2015-07-15 09:44:56 -04:00
Rejeesh Kutty ea57e49da7 axi_ad9250: remove avalon streaming interface 2015-07-15 09:44:54 -04:00
Rejeesh Kutty a454b73d27 fmcjesdadc1/a5gt: split xcvr cores 2015-07-15 09:44:53 -04:00
Rejeesh Kutty 2d8fa2024b fmcjesdadc1/a5gt: split xcvr cores 2015-07-15 09:44:52 -04:00
Rejeesh Kutty 226e23ca1f fmcjesdadc1- xcvr components 2015-07-15 09:44:51 -04:00
Istvan Csomortani 1dcbf5e5a2 fmcomms2/zc706: Fix GPIO connections
Fix GPIO connections for the FREQCVT board.
2015-07-15 15:12:01 +03:00
Rejeesh Kutty 1f7745610e daq2- ddr updates 2015-07-14 12:46:52 -04:00
Istvan Csomortani a38339a3ec fmcomms2/rfsom: Add GPIO control for the RF card 2015-07-14 13:12:54 +03:00
Istvan Csomortani ba2029a6e8 fmcomms2/rfsom: Delete trailing whitespaces from system_constr.xdc 2015-07-14 13:12:53 +03:00
Rejeesh Kutty a2e7fb9491 daq2/a10gx: qsys signal tap version 2015-07-13 10:07:18 -04:00
Rejeesh Kutty 6e3817d419 axi_jesd_xcvr: individual reset control 2015-07-13 10:04:34 -04:00
Rejeesh Kutty 8d6c39d307 ad9680- remove avalon streaming 2015-07-13 10:03:38 -04:00
Rejeesh Kutty c69e36314c ad9144- remove avalon streaming 2015-07-13 10:03:16 -04:00
Rejeesh Kutty 825fddd034 transceiver split up outside qsys 2015-07-10 11:45:07 -04:00
Rejeesh Kutty 8c0d74aa90 transceiver split up outside qsys 2015-07-10 11:44:42 -04:00
Rejeesh Kutty e40aac9ab6 transceiver split up outside qsys 2015-07-10 11:44:22 -04:00
Rejeesh Kutty 9d95ddc620 reset and clock additions 2015-07-09 14:29:08 -04:00
Adrian Costina 897c31ebbf imageon: moved spdif_rx to DMA3 to be compatible with both zc706 and zed 2015-07-09 10:58:54 +03:00
Rejeesh Kutty f1dd2435b4 signal tap removed 2015-07-08 15:47:31 -04:00
Rejeesh Kutty c9e73b023d signal tap removed 2015-07-08 15:46:52 -04:00
Rejeesh Kutty f64df40a0a signal tap removed 2015-07-08 15:47:50 -04:00
Rejeesh Kutty 19bf05c740 signal tap removed 2015-07-08 15:47:48 -04:00
Rejeesh Kutty d6d263341e signal tap needs another method 2015-07-08 15:47:47 -04:00
Rejeesh Kutty b25b2e3020 registers for signal tap 2015-07-08 15:47:45 -04:00
Adrian Costina b4eb7465ed library: Add missing Makefiles for axi_spdif_rx, util_jesd_align, util_jesd_xmit 2015-07-08 10:48:58 +03:00
Rejeesh Kutty bbf1c5b803 transceiver core added/gpio removed 2015-07-07 15:30:38 -04:00
Rejeesh Kutty 23428ac48b transceiver constraints for sysref 2015-07-07 15:25:36 -04:00
Rejeesh Kutty ea2bd71904 synchronize up signals separately 2015-07-07 12:51:13 -04:00
Rejeesh Kutty 075b1e5424 daq2/a10gx: added axi_jesd_xcvr control 2015-07-07 10:22:36 -04:00
Rejeesh Kutty c1fcbeec8e library/axi_jesd_xcvr: interface name matching 2015-07-07 10:21:53 -04:00
Rejeesh Kutty b106b8a8f4 library/axi_jesd_xcvr: updates 2015-07-06 13:51:55 -04:00
Rejeesh Kutty c67ca682a4 hw.tcl- added 2015-07-06 13:51:55 -04:00
Rejeesh Kutty 1cfe6fe792 axi_jesd_xcvr: initial commit 2015-07-06 13:51:55 -04:00
Rejeesh Kutty 3a5da47239 xcvr- initial checkin 2015-07-06 13:51:55 -04:00
Istvan Csomortani 46fa91d5be Makefile: Update Make files 2015-07-03 18:08:57 +03:00
Istvan Csomortani 8c98399c37 imageon_ZC706: Add axi_spdif_rx core to the design 2015-07-03 17:48:29 +03:00
Istvan Csomortani 7376218e01 axi_spdif_rx: Initial commit
NOT tested.
2015-07-03 17:46:45 +03:00
Lars-Peter Clausen 27b786e92f imageon_loopback: Use BUFIO for the HDMI clock buffer
Since we are just doing a loopback all the logic is contained within the
IO bank. By using a BUFIO instead of a BUFG we avoid having to route the
clock signal from the IO bank to the middle of the FPGA and back to the IO
bank. This reduces the skew between clock and the data signals and makes
sure that the we can use the same design over a range of different
resolutions without having to calibrate the delay.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-03 15:07:17 +02:00
Lars-Peter Clausen 02b5ce82ad imageon_loopback: Invert transmit clock
The ADV7511 samples on the rising edge. Update the data on the falling
edge, this gives us a larger margin and improved signal stability.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-03 15:07:17 +02:00
Lars-Peter Clausen 281cab091c imageon_loopback: Create a clock for hdmi_rx_clock
Create a clock for the HDMI clock to make sure that the timing paths are
properly constraint.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-03 15:07:17 +02:00
Istvan Csomortani 95500d4022 fmcomms2_rfsom: Fix GPIO connections 2015-07-03 13:03:19 +03:00
Lars-Peter Clausen eb3a0c179b imageon: Put HDMI input/output FF into the IOB
This gives us predictable delays as well as very small skew between the induvidual data lines.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-02 18:33:32 +02:00
Lars-Peter Clausen e269fe1dd0 Revert "imageon: Connect raw data to ILA"
This reverts commit 9e4fb2d048.

This conflicts with moving the capture FF into the IOB.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-02 18:33:32 +02:00
Adrian Costina 896888d495 axi_mc_current_monitor: updated ad7401 driver to send unsigned data 2015-07-02 14:23:19 +03:00