Commit Graph

6 Commits (7da98277821dff950871b3a8cafa6b2b789da7ed)

Author SHA1 Message Date
Iacob_Liviu fec4137046 ad400xx_fmc: Parametrize board select, sampling rate and adc resolution
fix comments
2021-09-01 15:03:10 +03:00
Istvan Csomortani 05469a011c ad40xx/xilinx: Activate AXI_SLICE_SRC for the DMA 2021-02-04 11:04:32 +02:00
Istvan Csomortani 738f7af23b ad40xx_fmc: SDI delay should be set to 1
In general we have to add a delay of half SCLK cycle.
(latch the MISO on the next consecutive SCLK edge)
2020-08-13 10:01:16 +03:00
Stanca Pop fcf7bb035a ad40xx: Fix data_width definition 2020-01-14 15:24:43 +02:00
Stanca Pop 9497b1cace ad40xx: Remove redundant upscaler IP, Add timing constraints 2020-01-09 11:32:31 +02:00
Istvan Csomortani 9ab88f1200 ad40xx: Initial commit 2019-06-28 11:18:29 +03:00