Commit Graph

34 Commits (7ec4c00f9f89e237a6f6c9b8296099f58bdbb653)

Author SHA1 Message Date
Adrian Costina 9d2b8809df Makefiles: Updated Makefiles 2015-10-23 10:44:27 +03:00
Adrian Costina 5b48340b08 fmcomms6: Updated ZC706 project 2015-09-28 11:32:20 +03:00
Adrian Costina 3b3c645827 fmcomms6: Updated project to Vivado 2015.2.1. Added cpack 2015-09-28 11:31:08 +03:00
Istvan Csomortani d52308f074 axi_dmac: Change parameter name 2D_TRANSFER
Parameter name can't start with numbers, 2D_TRANSFER was changed to DMA_2D_TRANSFER
2015-08-20 10:14:22 +03:00
Istvan Csomortani 57cfb7cfb1 hdl/library: Update the IP parameters
The following IP parameters were renamed:

PCORE_ID --> ID
PCORE_DEVTYPE --> DEVICE_TYPE
PCORE_IODELAY_GROUP --> IO_DELAY_GROUP
CH_DW --> CHANNEL_DATA_WIDTH
CH_CNT --> NUM_OF_CHANNELS
PCORE_BUFTYPE --> DEVICE_TYPE
PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE
CHID --> CHANNEL_ID
PCORE_DEVICE_TYPE --> DEVICE_TYPE
PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N
PCORE_SERDES_DDR_N --> SERDES_DDR_N
PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE
DP_DISABLE --> DATAPATH_DISABLE
PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE
C_BIG_ENDIAN --> BIG_ENDIAN
C_M_DATA_WIDTH --> MASTER_DATA_WIDTH
C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH
NUM_CHANNELS --> NUM_OF_CHANNELS
CHANNELS --> NUM_OF_CHANNELS
PCORE_4L_2L_N -->QUAD_OR_DUAL_N
C_ADDRESS_WIDTH --> ADDRESS_WIDTH
C_DATA_WIDTH --> DATA_WIDTH
C_CLKS_ASYNC --> CLKS_ASYNC
PCORE_QUAD_DUAL_N --> QUAD_DUAL_N
NUM_CS --> NUM_OF_CS
PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID
PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID
PCORE_CLK0_DIV --> CLK0_DIV
PCORE_CLK1_DIV --> CLK1_DIV
PCORE_CLKIN_PERIOD --> CLKIN_PERIOD
PCORE_VCO_DIV --> VCO_DIV
PCORE_Cr_Cb_N --> CR_CB_N
PCORE_VCO_MUL --> VCO_MUL
PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC
PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH
PCORE_ADDR_WIDTH --> ADDRESS_WIDTH
DADATA_WIDTH --> DATA_WIDTH
NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS
DEBOUNCER_LEN --> DEBOUNCER_LENGTH
ADDR_WIDTH --> ADDRESS_WIDTH
C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED
Cr_Cb_N --> CR_CB_N
ADDATA_WIDTH --> ADC_DATA_WIDTH
BUFTYPE --> DEVICE_TYPE
NUM_BITS --> NUM_OF_BITS
WIDTH_A --> A_DATA_WIDTH
WIDTH_B --> B_DATA_WIDTH
CH_OCNT --> NUM_OF_CHANNELS_O
M_CNT --> NUM_OF_CHANNELS_M
P_CNT --> NUM_OF_CHANNELS_P
CH_ICNT --> NUM_OF_CHANNELS_I
CH_MCNT --> NUM_OF_CHANNELS_M
4L_2L_N --> QUAD_OR_DUAL_N
SPI_CLK_ASYNC --> ASYNC_SPI_CLK
MMCM_BUFIO_N --> MMCM_OR_BUFIO_N
SERDES_DDR_N --> SERDES_OR_DDR_N
CLK_ASYNC --> ASYNC_CLK
CLKS_ASYNC --> ASYNC_CLK
SERDES --> SERDES_OR_DDR_N
GTH_GTX_N --> GTH_OR_GTX_N
IF_TYPE --> DDR_OR_SDR_N
PARALLEL_WIDTH --> DATA_WIDTH
ADD_SUB --> ADD_OR_SUB_N
A_WIDTH --> A_DATA_WIDTH
CONST_VALUE --> B_DATA_VALUE
IO_BASEADDR --> BASE_ADDRESS
IO_WIDTH --> DATA_WIDTH
QUAD_DUAL_N --> QUAD_OR_DUAL_N
AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT
ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH
ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH
MODE_OF_ENABLE --> CONTROL_TYPE
CONTROL_TYPE --> LEVEL_OR_PULSE_N
IQSEL --> Q_OR_I_N
MMCM --> MMCM_OR_BUFR_N
2015-08-19 14:11:47 +03:00
Adrian Costina a7da779b94 Makefile: Updated Makefiles 2015-07-16 18:19:42 +03:00
Lars-Peter Clausen 6862655b0d Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Lars-Peter Clausen 6b9906b22b Refresh Makefiles
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Adrian Costina 949abcdc8f Makefile: Updated makefiles so that the project recipe does not depend on lib 2015-05-06 14:58:29 +03:00
Adrian Costina dc2b37bd0c Makefile: Added top level Makefile. Modified behavior of clean and clean-all
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.

The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina 780455d68c Makefile: Updated makefiles. Added makefiles for altera 2015-04-09 17:57:06 +03:00
Rejeesh Kutty 5f8e9a74ea makefile: updated 2015-04-07 16:32:01 -04:00
Adrian Costina f79a152958 Makefiles: updated all makefiles adding clean functionality 2015-04-03 11:57:54 +03:00
Rejeesh Kutty 5165129c92 makefile: added 2015-04-01 16:29:52 -04:00
Rejeesh Kutty 1697f297f8 makefile: added 2015-04-01 16:29:50 -04:00
Rejeesh Kutty ee87421419 fmcomms6: 2014.4 updates 2015-03-19 15:36:52 -04:00
Rejeesh Kutty 4d91d85265 fmcomms6: 2014.4 updates 2015-03-19 15:36:51 -04:00
Rejeesh Kutty 5192adf5a7 fmcomms6: 2014.4 updates 2015-03-19 15:36:50 -04:00
Rejeesh Kutty c8d60d249b fmcomms6: 2014.4 updates 2015-03-19 15:36:48 -04:00
Rejeesh Kutty 9571ce3e3b fmcomms6: 2014.4 updates 2015-03-19 15:36:47 -04:00
Lars-Peter Clausen 58bc7c6886 fmcomms6: Add DMA overflow signal to ILA
This is useful for debugging DMA overflows.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 14:23:09 +01:00
Lars-Peter Clausen a9c6148570 fmcomms6: Better cope with higher sample rates
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:56:59 +01:00
Lars-Peter Clausen d773673e4f fmcomms6: Connect DMA directly to the HP port
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:09 +01:00
Lars-Peter Clausen 5169d3ef59 fmcomms6: Set ila type to native
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:09 +01:00
Istvan Csomortani 660424ef99 fmcomms6_fmc: Update interrupts 2014-11-24 18:23:35 +02:00
Istvan Csomortani 56aefb62ed fmcomms6_fmc: Cosmetic changes
Delete trailing white spaces, and fix alignment.
2014-11-24 18:23:34 +02:00
Istvan Csomortani 3645139e59 fmcomms6: Avoiding redefinition of system clocks. 2014-10-23 12:55:56 +03:00
Istvan Csomortani dd5d57843d fmcomms6: Update version of the ILA core 2014-10-23 12:30:55 +03:00
Istvan Csomortani 17675863e0 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
Rejeesh Kutty c435edf194 ad9652/zc706: fix dma write 2014-08-27 10:44:39 -04:00
Rejeesh Kutty 7b280b3bbf fmcomms6: zc706 build-only version 2014-08-27 10:44:37 -04:00
Rejeesh Kutty 0e909647b4 fmcomms6: initial checkin 2014-08-27 10:44:36 -04:00