Rejeesh Kutty
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a388ccab0a
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fmcomms2/c5soc: initial checkin
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2014-07-02 14:56:00 -04:00 |
|
Rejeesh Kutty
|
b6052773b7
|
added adc/dac gpio registers
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2014-06-27 14:45:58 -04:00 |
|
Rejeesh Kutty
|
10a7804e14
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ad9361: altera wrapper updates
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2014-06-25 15:26:06 -04:00 |
|
Rejeesh Kutty
|
985ace533e
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ad9361: remove unused modules
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2014-06-24 14:26:40 -04:00 |
|
Rejeesh Kutty
|
e650253013
|
library: register map changes and for mathworks
|
2014-06-24 14:22:05 -04:00 |
Adrian Costina
|
bef6a9c32c
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axi_ad9361: Split dma data into individual channels for both ADC and DAC
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2014-06-07 17:15:31 +03:00 |
|
Rejeesh Kutty
|
5b5bca400f
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ad9361: added adc loopback
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2014-05-27 14:47:59 -04:00 |
|
Rejeesh Kutty
|
842cd98b61
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ad9361: adc loopback option
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2014-05-27 12:15:02 -04:00 |
|
Rejeesh Kutty
|
3aed3ba71c
|
axi_ad9361: fmcomms5 changes
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2014-05-19 12:41:12 -04:00 |
|
Rejeesh Kutty
|
a007add714
|
iqcorrection: missing input signals fix
|
2014-05-09 11:17:50 -04:00 |
|
Rejeesh Kutty
|
1d50489870
|
ad9361: ml605 updates
|
2014-05-05 11:03:57 -04:00 |
ATofan
|
570ec26798
|
FMCOMMS2: Added sync option
|
2014-04-11 18:14:48 +03:00 |
|
ATofan
|
99ef34936f
|
Merge branch 'master' of https://github.com/analogdevicesinc/hdl
|
2014-04-11 18:14:08 +03:00 |
U-ANALOG\ACostina
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c73390b6c9
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axi_ad9361: Intermediary check in for altera porting
This is work in progress. It will not work as it is
|
2014-04-11 17:40:34 +03:00 |
|
ATofan
|
5aac9d7288
|
FMCOMMS2 added sync option
Added signals to allow synchronisation of multiple AD9361.
|
2014-04-10 10:46:42 +03:00 |
|
Rejeesh Kutty
|
25f416e46f
|
dds output is reset if disabled
|
2014-03-31 10:01:49 -04:00 |
|
Rejeesh Kutty
|
ad491e92ab
|
changed pcore version and made it local (top shouldn't override)
|
2014-03-14 12:02:16 -04:00 |
|
Rejeesh Kutty
|
580808e146
|
axi_ad9361: added
|
2014-03-11 20:01:55 -04:00 |