Istvan Csomortani
|
255b0ebd40
|
util_dacfifo: Add dac_xfer_out control
The dac_xfer_out control signal is asserted while the DAC reads back data. Should be connected to upack/dma_xfer_in.
|
2016-03-29 16:50:00 +03:00 |
Adrian Costina
|
657144d9a7
|
a10gx: Updated base design and DAQ2 to the new revision of the a10gx board
- tried using ATX PLL and fPLL for TX transceiver clocks, but could not get them to lock
- CMU PLL works correctly as temporary solution
|
2016-03-28 13:21:36 +03:00 |
|
Istvan Csomortani
|
7ce3f6e274
|
ad7616_sdz: Fix system top for parallel interface mode.
|
2016-03-24 13:49:30 +02:00 |
|
Istvan Csomortani
|
a1c2c61884
|
ad7616_sdz: Update the IOBUF instance names
|
2016-03-24 11:46:33 +02:00 |
AndreiGrozav
|
7c2f34549b
|
motcon2_fmc: Update common design to 2015.4
|
2016-03-23 10:27:07 +02:00 |
|
AndreiGrozav
|
b31cdac6bd
|
util_gmii_to_rgmii: Updated to 2015.4
The Xilinx interface changed its name from gmii_rtl_1 to gmii_rt_1
|
2016-03-23 10:14:18 +02:00 |
Rejeesh Kutty
|
46eddd04be
|
library: port updates on mmcm
|
2016-03-22 12:50:59 -04:00 |
|
Rejeesh Kutty
|
de4da6726b
|
axi_clkgen: port updates on mmcm
|
2016-03-22 12:50:59 -04:00 |
|
Rejeesh Kutty
|
74408881c6
|
axi_ad9122: optional clock out control
|
2016-03-22 12:50:59 -04:00 |
|
Rejeesh Kutty
|
65b2e51958
|
common/mmcm: add another clock
|
2016-03-22 12:50:59 -04:00 |
|
AndreiGrozav
|
769fecbe00
|
axi_i2s_adi: Fixed clock association
|
2016-03-21 20:18:45 +02:00 |
|
Istvan Csomortani
|
373481360b
|
util_dacfifo: Add a bypass option to the FIFO
|
2016-03-21 14:14:43 +02:00 |
|
AndreiGrozav
|
714caa964c
|
usdrx1: Update common design to 2015.4
|
2016-03-18 16:29:43 +02:00 |
|
AndreiGrozav
|
05f4f3ac09
|
usb_fx3: Update common design to 2015.4
|
2016-03-18 16:16:38 +02:00 |
|
AndreiGrozav
|
24fdd2b9b7
|
pzsdr/ccpci: Update common design to 2015.4
|
2016-03-18 15:30:10 +02:00 |
|
AndreiGrozav
|
f8b155faab
|
pzsdr/ccfmc: Update common design to 2015.4
|
2016-03-18 15:28:56 +02:00 |
|
AndreiGrozav
|
d567af54ef
|
imageon: Update common design to 2015.4
|
2016-03-18 15:27:31 +02:00 |
|
AndreiGrozav
|
995debedce
|
fmcomms2: Update common design to 2015.4
|
2016-03-18 15:26:52 +02:00 |
|
AndreiGrozav
|
b555be25d5
|
kcu105: Update common design to 2015.4
|
2016-03-18 15:22:42 +02:00 |
|
AndreiGrozav
|
412013d939
|
adv7511: Update common design to 2015.4
|
2016-03-18 15:01:25 +02:00 |
|
AndreiGrozav
|
6d277733d5
|
axi_spdif_rx: Fixed the clock association
|
2016-03-18 13:58:13 +02:00 |
|
AndreiGrozav
|
28990e362a
|
axi_spdif_tx: Fixed the clock association
|
2016-03-18 13:31:06 +02:00 |
|
Istvan Csomortani
|
896c734792
|
Revert "foobar"
This reverts commit a3cb8cac45.
|
2016-03-18 13:23:02 +02:00 |
|
Istvan Csomortani
|
a3cb8cac45
|
foobar
|
2016-03-18 11:51:13 +02:00 |
|
AndreiGrozav
|
d355aa0ea6
|
daq3/zc706: Updated design to 2015.4
|
2016-03-17 11:46:48 +02:00 |
|
AndreiGrozav
|
012b095006
|
daq3: Updated common design to 2015.4
|
2016-03-17 11:44:27 +02:00 |
|
AndreiGrozav
|
38c3f7474a
|
ad6676: Updated common design to 2015.4
|
2016-03-17 11:40:46 +02:00 |
|
AndreiGrozav
|
abc03fff2c
|
fmcomms7: Updated design to 2015.4
|
2016-03-17 09:11:41 +02:00 |
|
AndreiGrozav
|
59c726ecbe
|
fmcjesdadc1: Updated common design to 2015.4
|
2016-03-16 10:14:06 +02:00 |
|
AndreiGrozav
|
1a3aab0c13
|
fmcomms1: Updated common design to 2015.4
|
2016-03-16 10:09:54 +02:00 |
|
AndreiGrozav
|
b7be089b82
|
daq2: Updated common design to 2015.4
|
2016-03-16 10:02:42 +02:00 |
|
Istvan Csomortani
|
0905755db7
|
Update .gitignore file
|
2016-03-16 09:18:49 +02:00 |
|
Rejeesh Kutty
|
697469ee28
|
daq1- updates
|
2016-03-15 12:39:38 -04:00 |
|
Istvan Csomortani
|
665bfbc991
|
axi_ad7616: Add M_AXIS_READY_ENABLE parameter
m_axis_ready can be driven by the DMA or can have a constant active state. By default is always one.
|
2016-03-15 18:38:55 +02:00 |
|
AndreiGrozav
|
334fce03a3
|
fmcadc4/zc706: Updated design to 2015.4
|
2016-03-15 15:28:11 +02:00 |
|
AndreiGrozav
|
e8dd5f9788
|
fmcadc4: Updated common design to 2015.4
|
2016-03-15 15:27:25 +02:00 |
|
AndreiGrozav
|
98cc7dad7d
|
fmcadc2: Updated common design to 2015.4
|
2016-03-15 15:26:05 +02:00 |
|
AndreiGrozav
|
ceea7f25b2
|
fmcomms2: Updated common design to 2015.4
|
2016-03-15 15:23:20 +02:00 |
|
AndreiGrozav
|
6f03998b95
|
zc702: Updated common design to 2015.4
|
2016-03-15 15:21:22 +02:00 |
|
AndreiGrozav
|
a0c5f46940
|
zed: Updated common design to 2015.4
|
2016-03-15 15:20:46 +02:00 |
|
AndreiGrozav
|
9a258d5e4c
|
vc707: Updated common design to 2015.4
|
2016-03-15 15:20:02 +02:00 |
|
AndreiGrozav
|
bcf5bd8137
|
mitx045: Updated common design to 2015.4
|
2016-03-15 15:18:31 +02:00 |
|
AndreiGrozav
|
27f5f1dcbe
|
kc705: Updated common design to 2015.4
|
2016-03-15 15:17:53 +02:00 |
|
AndreiGrozav
|
eb743e0e03
|
ac701: Updated common design to 2015.4
|
2016-03-15 15:17:02 +02:00 |
|
AndreiGrozav
|
d282064103
|
zc706: Updated common design to 2015.4
|
2016-03-15 15:16:36 +02:00 |
|
AndreiGrozav
|
71be9519ec
|
adi_project.tcl: Updated to 2015.4
|
2016-03-15 15:03:50 +02:00 |
|
AndreiGrozav
|
9b2a106aa0
|
axi_jesd_gt: changed clock and reset naming to be consistent with the other projects
|
2016-03-15 11:20:31 +02:00 |
|
AndreiGrozav
|
06b7916303
|
axi_spdif_tx: changed adi_ip_properties_lite to adi_ip_properties, so that the axi interface can be inferred
|
2016-03-15 10:18:25 +02:00 |
|
AndreiGrozav
|
ef05642e26
|
axi_spdif_rx: changed adi_ip_properties_lite to adi_ip_properties, so that the axi interface can be inferred
|
2016-03-15 10:14:05 +02:00 |
|
AndreiGrozav
|
b3ed38107c
|
axi_i2s_adi: changed adi_ip_properties lite to adi_ip_properties, so that the axi interface can be inferred
|
2016-03-15 10:12:45 +02:00 |