Rejeesh Kutty
a76d6c4686
library/axi_ad9122,axi_ad9643: added
2014-03-11 12:13:25 -04:00
Rejeesh Kutty
e1f23e7d49
Merge branch 'master' of github.com:analogdevicesinc/hdl
2014-03-11 09:58:34 -04:00
Rejeesh Kutty
f3ae57a53e
global clock and reset names
2014-03-11 09:57:59 -04:00
rejeesh kutty
77ed085641
Update README.md
2014-03-10 16:41:22 -04:00
Rejeesh Kutty
0817973cc0
library: removed xilinx dc filter and dds
2014-03-10 14:52:48 -04:00
Rejeesh Kutty
f9dfd944c9
library/util_fifo: updates for read side
2014-03-10 14:48:14 -04:00
Istvan Csomortani
75963ab376
Initial check in of VC707 base project
...
- All source files for the VC707 base project
- Update the common base system to the new naming convention
2014-03-10 17:26:17 +02:00
Rejeesh Kutty
a6d747411e
util_wfifo: ip cleanup
2014-03-10 11:21:20 -04:00
Rejeesh Kutty
bb0431d3e8
library: dds and dcfilter changes, added fifo wrappers
2014-03-10 11:11:50 -04:00
Rejeesh Kutty
d6256e9e29
library: dds and dcfilter changes, added fifo wrappers
2014-03-10 11:11:16 -04:00
Lars-Peter Clausen
8326022adc
axi_dmac: address_generator: Fix disable race condition
...
If the address generator is disabled the very same cycle as it tries to put a
new address on the bus, it will keep sending this address forever and the core
will lock up
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-03-07 18:40:49 +01:00
Lars-Peter Clausen
6da9c65a08
axi_dmac: Add support for zero latency transfer switching
...
Right now there is always a period of one clock cycle where we can not transfer
any data when switching between two transfers. This patch modifies the data
mover to allow for zero latency. This fixes problems on the FMCOMMS1 platform
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-03-07 18:39:20 +01:00
Istvan Csomortani
f07b74ecdd
Merge branch 'master' of https://github.com/analogdevicesinc/hdl
2014-03-07 14:03:12 +02:00
Istvan Csomortani
793bf2f350
Change the adi_project_run process to prevent "const_type UCF" issue
...
- Set the constraint type to XDC before run the synthesis
2014-03-07 11:06:11 +02:00
Rejeesh Kutty
23a62a92b2
up_adc_common: dma bus width is 0x8 (constant)
2014-03-06 19:22:19 -05:00
Adrian Costina
32c2abf4e6
Merge branch 'master' of https://github.com/analogdevicesinc/hdl
2014-03-06 18:16:53 +02:00
Adrian Costina
831c19ea84
Added axi_dmac, axi_fifo and misc files in library
2014-03-06 18:16:02 +02:00
Rejeesh Kutty
5c3b65d01b
adv7511: kc705/ac701 updates
2014-03-06 09:36:50 -05:00
Rejeesh Kutty
3becfd5d51
added gitignore
2014-03-05 10:47:16 -05:00
Rejeesh Kutty
b0a1fab743
adv7511/kc705: added
2014-03-05 10:43:16 -05:00
Rejeesh Kutty
360f10395a
initial checkin
2014-03-03 13:42:25 -05:00
Rejeesh Kutty
82115b138e
adv7511/ac701: initial checkin
2014-03-03 13:40:24 -05:00
Rejeesh Kutty
c89477be5a
projects/adv7511: zynq boards
2014-03-03 10:16:49 -05:00
Rejeesh Kutty
350ec5e633
changed path settings
2014-03-03 10:06:36 -05:00
Rejeesh Kutty
3c0ea759a0
changed path settings
2014-03-03 10:06:02 -05:00
Rejeesh Kutty
ddac1a8834
added common board files
2014-02-28 21:17:01 -05:00
Rejeesh Kutty
63bd2b870a
pointers to directories
2014-02-28 16:58:30 -05:00
Rejeesh Kutty
ff5021b1a8
pointers to directories
2014-02-28 16:57:19 -05:00
Rejeesh Kutty
f7c9368abc
initial checkin
2014-02-28 14:26:22 -05:00
rejeesh kutty
64b7269288
Initial commit
2014-02-20 12:49:14 -08:00