Dan Hotoleanu
|
77f3e5155b
|
ad9081_fmca_ebz: Fix signal length parameter
Corrected the length parameter for the rx_data input.
Signed-off-by: Dan Hotoleanu <dan.hotoleanu@analog.com>
|
2021-12-08 14:29:48 +02:00 |
Filip Gherman
|
9295218a64
|
projects/ad9081_fmca_ebz: Updated makefiles
|
2021-10-05 16:56:57 +03:00 |
Laszlo Nagy
|
51b643b978
|
Makefile: Fix misc makefiles from projects and library
|
2021-10-05 14:24:48 +03:00 |
Adrian Costina
|
591a23156b
|
Makefiles: Update header with the appropriate license
|
2021-09-16 16:50:53 +03:00 |
David Winter
|
e9e278c898
|
ad9081_fmca_ebz: Remove bypass gpio
Signed-off-by: David Winter <david.winter@analog.com>
|
2021-08-06 11:55:24 +03:00 |
|
Laszlo Nagy
|
0d9e38bdbe
|
ad9081_fmca_ebz: Update path to common block design
Use absolute paths so ad9082 wrapper project can include the
system_bd.tcl instead of duplicating code.
|
2021-05-14 15:39:40 +03:00 |
|
Laszlo Nagy
|
680d28476c
|
ad9081_fmca_ebz: Add LANE_RATE param to all projects
The block design expects a lane rate to be set in the system project.
|
2021-05-14 15:39:40 +03:00 |
|
Laszlo Nagy
|
d0f8a81b2f
|
ad9081_fmca_ebz: Np 12 support
204B functional
204C functional
|
2021-02-05 15:24:15 +02:00 |
Sergiu Arpadi
|
6f2f2b8626
|
makefile: Regenerate make files
|
2021-01-20 01:02:56 +02:00 |
|
sergiu arpadi
|
acbbd4636a
|
sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
|
2021-01-20 01:02:56 +02:00 |
|
Laszlo Nagy
|
ad755788a0
|
ad9081_fmca_ebz/zc706: Initial version
M=8 L=4 SampleRate=250 MSPS
LaneRate=10 Gbps
|
2020-11-12 15:46:27 +02:00 |