Commit Graph

4 Commits (88e0cfec42e6bd9d7c601b918a7f1249c7878737)

Author SHA1 Message Date
Istvan Csomortani 88e0cfec42 axi_dacfifo: The AXI read and write have the same properties
AXI read and AXI write channel have the same SIZE and LENGTH.
2016-05-27 14:13:55 +03:00
Istvan Csomortani aca3038919 axi_dacfifo: No overflow for DAC 2016-05-27 14:13:55 +03:00
Istvan Csomortani 81ade7f26c axi_dacfifo: Fix resets
DMA side: axi_resetn is used to reset the address counters
DAC side: GT tx_rst is used to reset the last_address register
2016-05-27 14:13:55 +03:00
Istvan Csomortani e855ef38f4 axi_dacfifo: Initial commit
AXI DAC fifo, which use the PL side DDR memory. The minimum data granularity is 1kbyte.
2016-04-19 11:28:33 +03:00