pluto_hdl_adi

Commit Graph

Author	SHA1	Message	Date
Iulia Moldovan	961ebe0cc2	projects: Update .v files according to guideline Deleted lines after endmodule and consecutive empty lines. Modified parentheses, extra spaces. Fixed indentation. Fixed parameters list to be each parameter on its line. Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>	2022-06-28 18:06:56 +03:00
Laszlo Nagy	0dd3173547	adrv9001/zc706: Initial commit The project supports CMOS interface only. VADJ on the ZC706 must be programmed to 1.8V Instructions can be found here: https://www.xilinx.com/Attachment/ZC706_Power_Controllers_Reprogramming_Steps.pdf https://forums.xilinx.com/t5/Xilinx-Evaluation-Boards/ZC706-Doesn-t-work-with-VADJ-at-1-8v/td-p/430086	2021-03-03 09:03:03 +02:00

Author

SHA1

Message

Date

Iulia Moldovan

961ebe0cc2

projects: Update .v files according to guideline

Deleted lines after endmodule and consecutive empty lines.
Modified parentheses, extra spaces.
Fixed indentation.
Fixed parameters list to be each parameter on its line.

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>

2022-06-28 18:06:56 +03:00

Laszlo Nagy

0dd3173547

adrv9001/zc706: Initial commit

The project supports CMOS interface only.

VADJ on the ZC706 must be programmed to 1.8V
Instructions can be found here:
https://www.xilinx.com/Attachment/ZC706_Power_Controllers_Reprogramming_Steps.pdf
https://forums.xilinx.com/t5/Xilinx-Evaluation-Boards/ZC706-Doesn-t-work-with-VADJ-at-1-8v/td-p/430086

2021-03-03 09:03:03 +02:00

2 Commits (88f48cba619f281fc2b2f4102ad309391e9fa5ab)