Rejeesh Kutty
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8ed9d10502
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ad9625_fmc: disable sync
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2014-10-31 13:05:18 -04:00 |
Lars-Peter Clausen
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cc265b6b9c
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daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal
For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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2014-10-29 18:15:54 +01:00 |
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Rejeesh Kutty
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2e01ad2eec
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ad9625_fmc/zc706: ps7 interrupt updates
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2014-10-29 12:13:44 -04:00 |
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Rejeesh Kutty
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4788d09620
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vc707: interrupt updates
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2014-10-28 15:42:55 -04:00 |
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Rejeesh Kutty
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c9691fac64
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ad9625_fmc: merge zc706 and vc707
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2014-10-28 10:12:19 -04:00 |
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Rejeesh Kutty
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627da6161b
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ad9625_fmc: remove dma clock for now - zynq/non-zynq merge
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2014-10-28 10:12:18 -04:00 |
Istvan Csomortani
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17675863e0
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all_projects: Fix the interrupt connections to preserve IRQ layout
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2014-10-22 11:48:08 +03:00 |
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Rejeesh Kutty
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d4a21d9775
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ad9625_fmc: constraints fix
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2014-10-20 10:00:39 -04:00 |
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Rejeesh Kutty
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7f8270d74b
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ad9625_fmc: generic dma fifo for zynq and non-zynq boards
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2014-10-17 14:38:16 -04:00 |
|
Rejeesh Kutty
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0b30f98640
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ad9625_fmc/zc706: remove top level constraints
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2014-10-17 14:38:15 -04:00 |
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Rejeesh Kutty
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c375b5b26e
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daq3: vivado build
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2014-10-06 10:34:02 -04:00 |
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Rejeesh Kutty
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f0927afd0b
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ad9625_fmc: add dma fifo for non-zynq
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2014-10-01 14:51:14 -04:00 |
Michael Hennerich
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a3dbd5ac00
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projects/common/vc707/vc707_system_bd: AD9625_FMC update to 2014.2
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
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2014-09-16 14:59:36 +02:00 |
|
Istvan Csomortani
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4da8100fe5
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ad9625_plddr: Delete trailing whitespaces.
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2014-07-23 19:31:07 +03:00 |
|
Rejeesh Kutty
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b434fe6dd5
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fmcomms5: register map changes
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2014-07-08 16:57:43 -04:00 |
|
Rejeesh Kutty
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f2bf5ced04
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ad9625: register map updates
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2014-07-03 14:30:03 -04:00 |
|
Rejeesh Kutty
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e38813fa9f
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fifo- monitor status signals
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2014-06-25 12:15:13 -04:00 |
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Rejeesh Kutty
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2d27f88588
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ad9625_fmc, ad9625x2_fmc: initial checkin
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2014-06-09 16:40:48 -04:00 |