3 Commits (90ac7b7ac9781325a1c32cf7178d0a31b2032ac0)

Author	SHA1	Message	Date
Istvan Csomortani	7be017baa3	daq1: Add AXI PLDDR FIFO to the receive path ... The AD9684 has two 500 MSPS converter, the system can not handle this throughput without a FIFO.	2016-07-07 07:15:54 +03:00
Istvan Csomortani	75d2c7e93e	daq1_zc706: Update project to the new framework	2015-03-24 12:45:24 +02:00
Istvan Csomortani	ee752ec08a	daq1: Initial commit	2014-09-01 18:34:31 +03:00