Commit Graph

11 Commits (9295218a641c72ccdcc3516a2c909a1f0e9c63aa)

Author SHA1 Message Date
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Laszlo Nagy bb44e5399f adrv9001/zed: Connect TDD sync to PMOD JA1 2021-01-20 13:00:01 +02:00
Laszlo Nagy 18b2a8b0a7 adrv9001/zed: Add TDD support 2021-01-20 13:00:01 +02:00
Sergiu Arpadi 6f2f2b8626 makefile: Regenerate make files 2021-01-20 01:02:56 +02:00
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
2021-01-20 01:02:56 +02:00
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific
Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
Istvan Csomortani 37254358dd makefile: Regenerate make files 2020-10-20 12:51:10 +03:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Laszlo Nagy d14376547f adrv9001/zed: Refactor VADJ test in VADJ error
The ADRV9002 uses in the digital interface 1.8V, however the Zed VADJ is
selectable by a jumper can go up to 3.3V . Voltage levels higher than 1.8V
are detected by the EVAL-ADRV9002 board, asserting the VADJ_ERR pin.
If VADJ error is set high keep all drivers in high-z state and signalize
it to the software layer through a gpio line.
2020-08-31 14:14:03 +03:00
Laszlo Nagy a212ad6e58 adrv9001/zed: Update interface signal names based on direction
Let the names of signals from source synchronous interface match the
direction of the signals.
2020-08-28 13:23:00 +03:00
Laszlo Nagy 118e1f9e8b adrv9001/zed: Initial support for Zed
CMOS only support for ADRV9001 on ZedBoard
2020-08-24 17:49:12 +03:00