Commit Graph

10 Commits (929f80cd310f206c8102619958ed6acde0879e15)

Author SHA1 Message Date
Dan Hotoleanu f34b561e19 daq3: Parameterize JESD204 configuration values
Added the capability to set the JESD204 configuration values from a single
point in the code and to modify these default settings from the command
line for the Xilinx FPGAs in the project.

Signed-off-by: Dan Hotoleanu <dan.hotoleanu@analog.com>
2022-01-31 10:47:01 +02:00
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific
Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
Istvan Csomortani a589753d92 project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl 2019-06-29 06:53:51 +03:00
Istvan Csomortani 43725429ac adi_project: Rename the process adi_project_xilinx to adi_project 2019-06-29 06:53:51 +03:00
Istvan Csomortani a387018f7a daq3:kcu105: Performance_ExploreWithRemap results the highest WNS 2018-08-23 18:41:48 +03:00
Adrian Costina b7ca17f02b scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
Rejeesh Kutty c598e84258 remove processing order (no clock def dependency) 2017-02-22 16:02:08 -05:00
Istvan Csomortani df36902713 lib_refactoring: Fix path of the IO macros 2016-08-08 15:07:19 +03:00
Rejeesh Kutty 83fd4a53a7 daq3/kcu105: updates 2015-12-14 09:29:48 -05:00
Rejeesh Kutty 614babc18e daq3/kcu105: copy 2015-12-10 09:41:47 -05:00