Commit Graph

1911 Commits (95a2e02800381de8a43e2121f8e5ed292143017a)

Author SHA1 Message Date
Adrian Costina 6e89ac3d65 pzsdr2: ccusb_lvds, add flag_a,flag_b signals 2016-11-30 17:39:02 +02:00
Adrian Costina 0faa1ebff2 pzsdr1: ccusb_lvds, add flag_a,flag_b signals 2016-11-30 17:38:04 +02:00
Lars-Peter Clausen 84a76b9dea imageon: Invert HDMI TX clock
The ADV7511 samples the parallel data bus at the rising edge of sample
clock. Generate the clock so that the falling edge is aligned to updating
the bus data. This creates larger timing margins on each side of the
sampling edge and makes the design more robust.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-29 15:43:24 +01:00
Lars-Peter Clausen 24cc8d284b imageon: Increase RX DMA FIFO size
Increase the RX DMA FIFO to be able to better compensate for momentarily
memory bus contention. This has shown to resolve occasional overflows that
would occur under high system memory load.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-29 14:12:39 +01:00
Lars-Peter Clausen 99dae73d96 imageon: Connect hdmi_rx_core output clock to DMA
Connect the HDMI RX core output clock to the DMA rather than connecting the
HDMI RX input clock directly. This will allow the HDMI RX core to modify
the clock and e.g. insert clock buffers or similar.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-29 14:12:39 +01:00
Lars-Peter Clausen 07217740b5 imageon: Increase HDMI RX clock constraint
The ADV7611 is rated for a maximum clock rate of 165MHz. Increase the clock rate constraint to match this.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-29 14:12:39 +01:00
Adrian Costina 284fbac571 usdrx1: Xcvr updates, so that the channel parameters are correctly configured from boot time 2016-11-28 14:16:07 +02:00
Adrian Costina 45fd4f806d fmcjesdadc1: Fixed RX_PMA_CFG parameter 2016-11-25 16:33:58 +02:00
Rejeesh Kutty 11b57290f1 fmcadc5- replaced with axi_adxcvr 2016-11-23 16:22:05 -05:00
Rejeesh Kutty 22e230618c scripts/adi_board.tcl- support multiple xcvrs 2016-11-23 16:22:05 -05:00
Rejeesh Kutty 862bd7ef2c daq3/zc706- xcvr changes 2016-11-23 15:02:20 -05:00
Rejeesh Kutty 4e3e623530 pzsdr2/ccpci- updates 2016-11-23 14:02:59 -05:00
Rejeesh Kutty e5d3bae54d projects/ad6676-adrv9371: xcvr updates 2016-11-23 11:06:22 -05:00
Rejeesh Kutty daa3df4b96 projects/- xcvr updates 2016-11-22 16:23:05 -05:00
Rejeesh Kutty 8f562fd069 xcvr updates- board procedure 2016-11-22 14:43:36 -05:00
Rejeesh Kutty b1a9bd96f1 daq2: xcvr pll changes 2016-11-22 12:53:29 -05:00
Rejeesh Kutty 750b23621b board-tcl: xcvr qpll/cpll changes 2016-11-22 12:53:02 -05:00
Rejeesh Kutty 4ed7469286 fmcadc4/zc706- updates 2016-11-22 10:32:05 -05:00
Adrian Costina 8c4279f618 pzsdr1: Added ccusb_lvds initial project 2016-11-22 16:58:34 +02:00
Adrian Costina 3d0049d274 pzsdr2: ccusb_lvdsr, updated project for the latest schematic 2016-11-22 16:55:52 +02:00
AndreiGrozav aff45eae5f fmcadc2: xcvr updates 2016-11-21 18:45:38 +02:00
Rejeesh Kutty 69ee410d3d fmcomms2/zc706pr- bypass pr as default 2016-11-21 09:45:10 -05:00
Rejeesh Kutty 4739d05269 zc706pr/common- removed 2016-11-18 14:52:39 -05:00
Rejeesh Kutty f43248c2bc common/pzsdr*- removed 2016-11-18 11:32:43 -05:00
Lars-Peter Clausen 0d75bcb606 pzsdr2: ccbox: Use DMA interface 0+1 for audio
There is a bug in the ps7 component specification that causes critical
warnings to appear in the build log if DMA interface 0 is disabled, but any
other DMA interface is enabled.

Work around this issue by using DMA interface 0 and 1 instead of 1 and 2
for the I2S DMA.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-18 14:03:46 +01:00
Rejeesh Kutty b62f60b0da pzsdr1/ccbox- updates 2016-11-17 16:14:28 -05:00
Rejeesh Kutty 935f8a5c7b pzsdr1/ccbox- constraints 2016-11-17 16:13:53 -05:00
Rejeesh Kutty 4f65bcb3b2 pzsdr1/ccbrk_cmos- updates 2016-11-17 15:32:49 -05:00
Rejeesh Kutty e85dd2740a pzsdr1/ccbrk_lvds- updates 2016-11-17 15:32:25 -05:00
Rejeesh Kutty a61da1d2ac pzsdr1/common- updates 2016-11-17 15:31:25 -05:00
Rejeesh Kutty aa02ca875f pzsdr1- common files 2016-11-17 13:40:25 -05:00
Rejeesh Kutty 8c25402d53 pzsdr1- common files 2016-11-17 13:40:04 -05:00
Rejeesh Kutty 4dae754287 pzsdr1- added readme 2016-11-17 11:29:01 -05:00
Rejeesh Kutty 778638a7a1 pzsdr2- make updates 2016-11-17 10:26:45 -05:00
Rejeesh Kutty 74bf4dfb80 pzsdr2- gpio- turn-around 2016-11-17 10:24:50 -05:00
Rejeesh Kutty d0166a4c7e ccbox- updates 2016-11-17 10:24:11 -05:00
Rejeesh Kutty c2b7cbd61b ccbox- constraints 2016-11-17 10:23:51 -05:00
Rejeesh Kutty 5e6b931150 ccbox- added 2016-11-17 09:28:33 -05:00
Rejeesh Kutty fb5d36b250 pzsdr2- update ccfmc 2016-11-16 16:27:41 -05:00
Rejeesh Kutty 95c44b687e pzsdr2- fmc/pci constraints 2016-11-16 16:27:41 -05:00
Rejeesh Kutty 11347c49be fmcomms11- device set to -3 2016-11-16 13:43:07 -05:00
Rejeesh Kutty b85a282748 fmcomms11- lane swap 2016-11-16 10:26:47 -05:00
István Csomortáni bdd14c3874 README: Delete second rule under headers
By default there is a rule under each header, no need for another one.
2016-11-16 11:04:43 +02:00
István Csomortáni 81e47edcd5 README: Set links for documentation 2016-11-16 10:57:39 +02:00
rejeesh kutty fabbe4981e Update README.md
updated
2016-11-15 16:15:55 -05:00
Rejeesh Kutty 538a1c977f pzsdr2: make files 2016-11-15 16:00:55 -05:00
rejeesh kutty 4905e80df8 Update README.md
updated
2016-11-15 14:16:46 -05:00
Rejeesh Kutty db243df97e pzsdr2- updates 2016-11-15 14:16:06 -05:00
AndreiGrozav 0897716167 fmcadc4: xcvr updates 2016-11-15 16:03:52 +02:00
AndreiGrozav cac4057449 daq2/common: Altera updates 2016-11-15 16:03:52 +02:00