5fa6dba333
Make: Update Makefiles
2017-02-10 16:32:58 +02:00
1e54b5230f
axi_adxcvr- add m_axi associated clock
2017-02-02 11:17:56 -05:00
806d19febc
axi_adxcvr- add primitive info read
2017-02-01 13:38:29 -05:00
1c9d8c4e7c
axi_adxcvr- add primitive info read
2017-02-01 13:35:02 -05:00
d5af828b9c
Merge branch 'dev' into hdl_2016_r2
2017-01-30 17:10:05 +02:00
afcd11da87
adxcvr- add parameters for xcvr config
2017-01-19 12:40:26 -05:00
746b97dd96
xilin/axi_adxcvr: Fix clock and reset nets[C
2017-01-19 15:46:16 +02:00
d3ed417f49
axi_adxcvr: Update the packaging script to fix infer mm issues
...
- Change the clock and reset port name of the AXI slave interface
to s_axi_aclk and s_axi_aresetn. This way we can use the adi_ip_properties
process to infer the interface.
- Define an address space reference to the m_axi interface.
2017-01-19 15:16:04 +02:00
8ebc8fe4e2
updated makefiles
2016-12-09 23:06:41 +02:00
c57ffc9364
axi_adxcvr- separate pll reset from channels
2016-11-22 11:12:54 -05:00
10b9a0e52f
upadated xcvr ips
2016-08-17 15:51:55 -04:00
829e4155ca
modified transceiver configuration files
2016-08-10 14:59:38 -04:00
d60bce654c
Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools
2016-08-05 15:16:04 +03:00
cb23ba8bb7
make- script needs update
2016-08-04 14:17:04 -04:00
e42b4ea378
hdlmake- updates
2016-08-04 13:28:25 -04:00
2b7c976be5
xcvr- altera/xilinx split
2016-08-04 13:26:10 -04:00
Istvan Csomortani
Rejeesh Kutty
Adrian Costina
Shrutika Redkar