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14 Commits (981a61bf162c10c287d729422a1de6046e6fa91e)

Author SHA1 Message Date
Rejeesh Kutty 37d54bb984 fmcjesdadc1/a5gt- max delay fit only 2017-01-04 16:04:19 -05:00
Rejeesh Kutty 8b74e911b8 fmcjesdadc1/a5gt- qr to ddio max delay 2017-01-04 14:10:44 -05:00
Rejeesh Kutty 18660c7ab4 fmcjesdadc1/a5gt: ddr3 use ip constraints 2016-12-22 14:14:21 -05:00
Rejeesh Kutty 85eac8c811 fmcjesdadc1/a5*- updates 2016-11-10 16:57:06 -05:00
Adrian Costina 0f37dd6424 fmcjesdadc1: Fixed project 
- changed system_project.tcl so that all base designs to be included
- changed DMA properties to take into consideration the new parameter names
- changed reset bridges to asynchronous
- increased maximum burst size of the DMA bridge
- changed the data_width of the memory bus to 256, as with 512 timing violations may occur
- changed base addresses for the base system to be the same as in the previous release
 2016-02-19 14:09:57 +02:00
Rejeesh Kutty 3ccf1bef36 base system modifications 2015-07-23 15:23:10 -04:00
Rejeesh Kutty 18e8914087 fmcjesdadc1/a5gt: pn-errors version 2015-07-01 13:43:12 -04:00
Rejeesh Kutty 330c205e8e fmcjesdadc1- sys_clk changes 2015-06-30 10:47:21 -04:00
Rejeesh Kutty 543e08b67a fmcadc1: sdc updates 2015-06-25 04:25:39 -04:00
Rejeesh Kutty 15740a7d34 fmcjesdadc1- 15.0 updates 2015-06-24 05:31:09 -04:00
Lars-Peter Clausen 50faf0c53a Remove executable flags from non-exectuable files 2014-09-09 15:05:06 +02:00
Rejeesh Kutty e85153b5dd altera hal version 2014-04-01 21:12:11 -04:00
Rejeesh Kutty 04df908fbf altera-fmcjesdadc1 initial checkin 2014-04-01 12:01:57 -04:00
Rejeesh Kutty 0d678b89ed altera a5gt fmcjesdadc1 setup 2014-04-01 11:46:37 -04:00