Commit Graph

309 Commits (98d3d44fd1247eae1ef460734ece3a0028d91d37)

Author SHA1 Message Date
Rejeesh Kutty 8311098384 daq2/kc705- adxcvr changes 2016-08-16 12:54:39 -04:00
Rejeesh Kutty 5d93e542ed daq2-kcu105: 2016.2 updates 2016-08-11 10:00:41 -04:00
Rejeesh Kutty c6f4def93d altera- make mmu a make switch 2016-08-08 11:54:51 -04:00
Istvan Csomortani 0cd608a7e2 lib_refactoring: Update Make files 2016-08-08 16:38:38 +03:00
Istvan Csomortani df36902713 lib_refactoring: Fix path of the IO macros 2016-08-08 15:07:19 +03:00
Istvan Csomortani f784557895 lib_refactoring: IOBUF is a Xilinx macro, no need to use with Altera 2016-08-08 15:06:34 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty e42b4ea378 hdlmake- updates 2016-08-04 13:28:25 -04:00
Rejeesh Kutty ed9e92621c daq2- spi+xcvr address conflict 2016-08-04 10:50:31 -04:00
Adrian Costina 9a563de8ff daq2: A10GX updated project to Quartus 16.0
- connected directly axi_ad9680 to xcvr_core, skipping axi_jesd_xcvr
2016-08-01 15:09:53 +03:00
Istvan Csomortani 7ca8e10004 make: Update Make files 2016-08-01 14:24:48 +03:00
Shrutika Redkar 9952a94efb hdl-vivado-2016.2- ip version updates 2016-07-28 13:44:57 -04:00
Rejeesh Kutty 39a5534e00 hdlmake- updates 2016-07-21 16:10:38 -04:00
Rejeesh Kutty 6df5ba1a7a daq2- adxcvr version 2016-07-21 16:09:33 -04:00
Rejeesh Kutty eaf4d4a19d makefile updates 2016-06-10 14:26:14 -04:00
Rejeesh Kutty 468800bb38 daq2/a10gx- makefile update 2016-06-07 14:06:42 -04:00
Rejeesh Kutty 625052f46e daq2/a10gx- qsys updates 2016-06-07 12:28:04 -04:00
Rejeesh Kutty ae1dd1d58e daq2/a10gx- qsys updates 2016-06-07 12:28:04 -04:00
Rejeesh Kutty 3516ec28b7 daq2/a10gx- qsys updates 2016-06-07 12:28:04 -04:00
Rejeesh Kutty 39d23032f1 daq2- qsys updates 2016-05-23 10:55:44 -04:00
Istvan Csomortani b0538a03a2 Make: Update 2016-05-06 16:44:24 +03:00
Istvan Csomortani 4863a04132 axi_adc/dacfifo: Split the intergration script file
Split the integration script file into two separate script files. Rename the
integration processes names to be more meaningful.
2016-05-05 09:53:55 +03:00
Rejeesh Kutty 385ed31a45 make files update 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 7a4a7edfba daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:07:41 -04:00
Rejeesh Kutty e00236e5fd daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:04:46 -04:00
AndreiGrozav 679d471d75 Merge branch 'hdl_2016_r1' into dev
hdl_2016_r1 contains IP core upgrades to Vivado 2015.4.2 and hdmi_tx improvements.
2016-04-19 18:05:50 +03:00
Rejeesh Kutty 3006c5a223 make updates 2016-04-11 16:14:59 -04:00
AndreiGrozav 21208ca208 Makefiles: Update Makefiles 2016-03-31 12:37:47 +03:00
Istvan Csomortani 1fab6ce477 daq2/common: Add util_dacfifo/dac_xfer_out control 2016-03-29 16:55:33 +03:00
Adrian Costina 657144d9a7 a10gx: Updated base design and DAQ2 to the new revision of the a10gx board
- tried using ATX PLL and fPLL for TX transceiver clocks, but could not get them to lock
- CMU PLL works correctly as temporary solution
2016-03-28 13:21:36 +03:00
AndreiGrozav b7be089b82 daq2: Updated common design to 2015.4 2016-03-16 10:02:42 +02:00
Adrian Costina 977d9d0624 Merge branch 'hdl_2015_r2' into dev
Conflicts:
	projects/daq1/common/daq1_spi.v
2016-03-02 13:52:15 +02:00
Adrian Costina 40fb68dfd5 ad9265, ad9434, ad9467, daq1, daq2, daq3, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1, fmcomms6, fmcomms7, usdrx1: updated common spi module so that spi streaming is possible 2016-03-02 13:39:37 +02:00
Adrian Costina becc23a69b daq2: Modified common spi module so that spi streaming is possible
- stop incrementing spi_count after the instruction cycle
2016-03-01 17:25:58 +02:00
Rejeesh Kutty e012d0519b Merge remote-tracking branch 'origin/hdl_2015_r2' into dev 2016-02-26 13:39:39 -05:00
Adrian Costina 8ccd8d87bb daq2: A10GX, increase analog/digital reset durations
- reset the xcvr_rst_cntrl only from the axi_jesd_xcvr
- checked separate RX/TX reset per channel
2016-02-23 11:41:38 +02:00
Adrian Costina 377461e0d4 Merge branch 'hdl_2015_r2' into dev 2016-02-19 14:15:27 +02:00
Adrian Costina ad9ecbbbb6 daq2: Updated a10gx project to quartus 15.1.1 2016-02-05 17:43:05 +02:00
Istvan Csomortani e22d5d5c18 daq2: Fix clock constraints for KC705 and VC707 2016-01-22 19:09:57 +02:00
Rejeesh Kutty da2e1bdc9a daq2/a10gx: 32bits generic gpio 2015-12-11 11:50:26 -05:00
Adrian Costina 2309c4d83c Makefiles: Removed " from path 2015-11-27 14:02:46 +02:00
Adrian Costina 159f6c1216 Makefiles: Updated Makefiles
- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
Adrian Costina ea57b3c03c daq2: A10GX, add project specific IP search paths 2015-11-25 10:58:36 +02:00
Adrian Costina a81625e1fa daq2: Updated a10gx project 2015-11-24 13:28:53 +02:00
Adrian Costina 5cc97c78d3 Makefiles: Update makefiles to include the nerw axi_gpreg / util_mfifo libraries 2015-11-10 09:32:50 +02:00
Adrian Costina e36f27b061 daq2: Update A10GX project, with the latest changes.
Works with up to 64k samples
2015-11-04 14:54:09 +02:00
Adrian Costina 9d2b8809df Makefiles: Updated Makefiles 2015-10-23 10:44:27 +03:00
Lars-Peter Clausen 7184827d68 daq2: Drop explicit axi_dmac clock synchronicity configuration
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:27:54 +02:00
Istvan Csomortani a679251d7d Makefiles: Update Make 2015-09-09 17:13:19 +03:00
Rejeesh Kutty f1d416a98b daq2/a10gx- ethernet fix 2015-09-02 14:31:15 -04:00
Rejeesh Kutty 1fff1076b1 daq2/a10gx- ethernet fix 2015-09-02 14:31:15 -04:00
Rejeesh Kutty 15be942b74 daq2-a10gx- ignore cpu2ddr-io paths 2015-08-27 13:54:05 -04:00
Rejeesh Kutty 90e4cadf4b daq2/kcu105- xcvr pin loc 2015-08-27 12:40:44 -04:00
Rejeesh Kutty 7c8e56cb09 daq2/kcu105- pin loc is now all errors 2015-08-27 11:18:00 -04:00
Rejeesh Kutty 89c7a4de79 daq2/kcu105- parameter changes 2015-08-27 11:18:00 -04:00
Rejeesh Kutty 58fa29b673 daq2- jesd core upgrade 2015-08-27 11:18:00 -04:00
Rejeesh Kutty 78cf0fce0e ddr/eth- pll refclock is defined by the cores 2015-08-21 14:42:15 -04:00
Rejeesh Kutty 827fc1e29a remove auto-pack disable 2015-08-20 13:54:16 -04:00
Rejeesh Kutty 2dabf98089 parameter changes 2015-08-20 08:54:13 -04:00
Istvan Csomortani d52308f074 axi_dmac: Change parameter name 2D_TRANSFER
Parameter name can't start with numbers, 2D_TRANSFER was changed to DMA_2D_TRANSFER
2015-08-20 10:14:22 +03:00
Rejeesh Kutty 0ec17fd4d6 daq2-a10gx- parameter changes 2015-08-19 14:56:00 -04:00
Rejeesh Kutty 0e587dd955 daq2/a10gx-- ad-rst unpack 2015-08-19 13:26:38 -04:00
Rejeesh Kutty fdeeef3d77 daq2/a10gx-- intmem to ddr 2015-08-19 13:26:38 -04:00
Rejeesh Kutty 413c322145 base/daq2- updates 2015-08-19 13:26:38 -04:00
Rejeesh Kutty f40abf171f cpack- adc_rst added 2015-08-19 13:26:38 -04:00
Istvan Csomortani 57cfb7cfb1 hdl/library: Update the IP parameters
The following IP parameters were renamed:

PCORE_ID --> ID
PCORE_DEVTYPE --> DEVICE_TYPE
PCORE_IODELAY_GROUP --> IO_DELAY_GROUP
CH_DW --> CHANNEL_DATA_WIDTH
CH_CNT --> NUM_OF_CHANNELS
PCORE_BUFTYPE --> DEVICE_TYPE
PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE
CHID --> CHANNEL_ID
PCORE_DEVICE_TYPE --> DEVICE_TYPE
PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N
PCORE_SERDES_DDR_N --> SERDES_DDR_N
PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE
DP_DISABLE --> DATAPATH_DISABLE
PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE
C_BIG_ENDIAN --> BIG_ENDIAN
C_M_DATA_WIDTH --> MASTER_DATA_WIDTH
C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH
NUM_CHANNELS --> NUM_OF_CHANNELS
CHANNELS --> NUM_OF_CHANNELS
PCORE_4L_2L_N -->QUAD_OR_DUAL_N
C_ADDRESS_WIDTH --> ADDRESS_WIDTH
C_DATA_WIDTH --> DATA_WIDTH
C_CLKS_ASYNC --> CLKS_ASYNC
PCORE_QUAD_DUAL_N --> QUAD_DUAL_N
NUM_CS --> NUM_OF_CS
PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID
PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID
PCORE_CLK0_DIV --> CLK0_DIV
PCORE_CLK1_DIV --> CLK1_DIV
PCORE_CLKIN_PERIOD --> CLKIN_PERIOD
PCORE_VCO_DIV --> VCO_DIV
PCORE_Cr_Cb_N --> CR_CB_N
PCORE_VCO_MUL --> VCO_MUL
PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC
PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH
PCORE_ADDR_WIDTH --> ADDRESS_WIDTH
DADATA_WIDTH --> DATA_WIDTH
NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS
DEBOUNCER_LEN --> DEBOUNCER_LENGTH
ADDR_WIDTH --> ADDRESS_WIDTH
C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED
Cr_Cb_N --> CR_CB_N
ADDATA_WIDTH --> ADC_DATA_WIDTH
BUFTYPE --> DEVICE_TYPE
NUM_BITS --> NUM_OF_BITS
WIDTH_A --> A_DATA_WIDTH
WIDTH_B --> B_DATA_WIDTH
CH_OCNT --> NUM_OF_CHANNELS_O
M_CNT --> NUM_OF_CHANNELS_M
P_CNT --> NUM_OF_CHANNELS_P
CH_ICNT --> NUM_OF_CHANNELS_I
CH_MCNT --> NUM_OF_CHANNELS_M
4L_2L_N --> QUAD_OR_DUAL_N
SPI_CLK_ASYNC --> ASYNC_SPI_CLK
MMCM_BUFIO_N --> MMCM_OR_BUFIO_N
SERDES_DDR_N --> SERDES_OR_DDR_N
CLK_ASYNC --> ASYNC_CLK
CLKS_ASYNC --> ASYNC_CLK
SERDES --> SERDES_OR_DDR_N
GTH_GTX_N --> GTH_OR_GTX_N
IF_TYPE --> DDR_OR_SDR_N
PARALLEL_WIDTH --> DATA_WIDTH
ADD_SUB --> ADD_OR_SUB_N
A_WIDTH --> A_DATA_WIDTH
CONST_VALUE --> B_DATA_VALUE
IO_BASEADDR --> BASE_ADDRESS
IO_WIDTH --> DATA_WIDTH
QUAD_DUAL_N --> QUAD_OR_DUAL_N
AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT
ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH
ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH
MODE_OF_ENABLE --> CONTROL_TYPE
CONTROL_TYPE --> LEVEL_OR_PULSE_N
IQSEL --> Q_OR_I_N
MMCM --> MMCM_OR_BUFR_N
2015-08-19 14:11:47 +03:00
Rejeesh Kutty e221c3b48c daq2- gt changes 2015-08-17 14:11:58 -04:00
Rejeesh Kutty c72cf99562 daq2- gt changes 2015-08-17 14:11:58 -04:00
Rejeesh Kutty b4eac232db a10gx- move cores inside qsys 2015-07-21 11:06:45 -04:00
Rejeesh Kutty fcc298d837 a10gx- move cores inside qsys 2015-07-21 11:06:17 -04:00
Rejeesh Kutty b3102b5095 daq2/a10gx-- xcvr+base changes 2015-07-21 11:01:45 -04:00
Rejeesh Kutty 445c4c835d daq2-bd: xcvr components 2015-07-21 10:54:23 -04:00
Rejeesh Kutty 97b8468819 daq2- constraints 2015-07-20 09:32:17 -04:00
Rejeesh Kutty 1d6a77049d daq2- base/board split 2015-07-20 09:31:57 -04:00
Rejeesh Kutty 4b8d764852 daq2- base system modifications 2015-07-20 09:31:44 -04:00
Rejeesh Kutty da2e7acacb daq2- separate base/board systems 2015-07-20 09:31:15 -04:00
Rejeesh Kutty 2f53dc4412 daq2- board system only 2015-07-20 09:30:32 -04:00
Rejeesh Kutty 80dc3bf92f daq2/a10gx: remove signal tap 2015-07-16 14:59:01 -04:00
Adrian Costina a7da779b94 Makefile: Updated Makefiles 2015-07-16 18:19:42 +03:00
Rejeesh Kutty 7c142178dd daq2/a10gx- axi_jesd_xcvr sysref name changes 2015-07-15 15:59:52 -04:00
Rejeesh Kutty ffd767deb2 daq2/a10gx- axi_jesd_xcvr sysref name changes 2015-07-15 15:59:51 -04:00
Rejeesh Kutty 1f7745610e daq2- ddr updates 2015-07-14 12:46:52 -04:00
Rejeesh Kutty a2e7fb9491 daq2/a10gx: qsys signal tap version 2015-07-13 10:07:18 -04:00
Rejeesh Kutty 825fddd034 transceiver split up outside qsys 2015-07-10 11:45:07 -04:00
Rejeesh Kutty 8c0d74aa90 transceiver split up outside qsys 2015-07-10 11:44:42 -04:00
Rejeesh Kutty e40aac9ab6 transceiver split up outside qsys 2015-07-10 11:44:22 -04:00
Rejeesh Kutty f1dd2435b4 signal tap removed 2015-07-08 15:47:31 -04:00
Rejeesh Kutty c9e73b023d signal tap removed 2015-07-08 15:46:52 -04:00
Rejeesh Kutty 075b1e5424 daq2/a10gx: added axi_jesd_xcvr control 2015-07-07 10:22:36 -04:00
Istvan Csomortani 46fa91d5be Makefile: Update Make files 2015-07-03 18:08:57 +03:00
Rejeesh Kutty 6bc24e25eb stap- need to be qsys 2015-06-29 13:26:32 -04:00
Rejeesh Kutty d25e02d7ee stap- need to be qsys 2015-06-29 13:26:20 -04:00
Lars-Peter Clausen 6862655b0d Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Rejeesh Kutty 714d415804 daq2/a10gx- signaltap changes 2015-06-19 14:33:04 -04:00
Rejeesh Kutty 51e6a74a3d daq2/a10gx- add xmit swap 2015-06-19 14:32:59 -04:00
Rejeesh Kutty d6b1260678 daq2/a10gx- signal tap + gpio 2015-06-19 14:32:58 -04:00
Rejeesh Kutty 67df6b3ea8 a10gx- disable lab cell on dsp input register 2015-06-19 14:32:54 -04:00
Rejeesh Kutty 4c80013faf projects/daq2: gt lane split 2015-06-12 15:56:03 -04:00
Istvan Csomortani e6525136a9 daq2/common: axi_ad9144_fifo needs a proper reset sequence
Connect the axi_ad9144_fifo/dma_rst signal to sys_cpu_reset
2015-06-12 14:03:46 +03:00
Rejeesh Kutty f587aa42d9 a10gx- tx sync 2015-06-10 14:32:25 -04:00
Rejeesh Kutty e3e4af5c51 daq2/zc706: open ports 2015-06-10 14:25:58 -04:00
Rejeesh Kutty 00b8c171b8 a10gx: pll locked to reset controller 2015-06-08 15:00:11 -04:00
Rejeesh Kutty f81d22a17a altera- common timing check 2015-06-04 10:56:32 -04:00
Rejeesh Kutty d111692608 daq2/a10gx- ddr-ref @133 2015-06-04 10:53:16 -04:00
Rejeesh Kutty f9ffaf457d projects/daq2- drp moved to up clock 2015-06-01 13:39:26 -04:00
Rejeesh Kutty 4a701d3895 a10gx- no-ddr 2015-06-01 11:00:02 -04:00
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Rejeesh Kutty ad3198f623 a10gx: top level fixes 2015-05-21 14:06:15 -04:00
Lars-Peter Clausen 6b9906b22b Refresh Makefiles
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Rejeesh Kutty 19b094cab5 daq2/a10gx- added jesd align 2015-05-20 15:39:27 -04:00
Rejeesh Kutty f1c30ac225 daq2/a10gx- qsys updates 2015-05-20 14:24:49 -04:00
Rejeesh Kutty 52b6077a46 a10gx- 15.0 updates 2015-05-19 15:12:23 -04:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Rejeesh Kutty 672a5a4dfa a10gx- updates 2015-05-14 14:35:43 -04:00
Rejeesh Kutty 848dac70d5 a10gx: updates-- 2015-05-11 11:56:27 -04:00
Rejeesh Kutty dc0eea5f0f a10gx: updates-- 2015-05-11 11:56:26 -04:00
Rejeesh Kutty bdc3f3d807 a10gx: updates-- 2015-05-11 11:56:24 -04:00
Rejeesh Kutty 75e055dab9 daq2/a10gx- initial commit 2015-05-11 11:56:23 -04:00
Istvan Csomortani 15618c9edf daq2 : Integrate the DACFIFO into the supported projects.
+ All pack/unpack logic is made by the cpack and upack modules.
+ The DAC FIFO is integrated between the TX DMA and cpack.
+ All the top files are updated, all the projects compiled successfully.
2015-05-11 12:20:50 +03:00
Adrian Costina 00335a2af2 Makefile: Fix ZC706 Makefiles with propper address for the mig file 2015-05-11 10:25:07 +03:00
Adrian Costina 91279253ef Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile 2015-05-08 15:31:40 +03:00
Adrian Costina 949abcdc8f Makefile: Updated makefiles so that the project recipe does not depend on lib 2015-05-06 14:58:29 +03:00
Adrian Costina e332fa01c8 ad6676evb, daq2, fmcadc2, fmcjesdadc1, usdrx1: Updated jesd reset connection 2015-04-30 12:11:46 +03:00
Adrian Costina a61a195e3f Makefiles: Updated makefiles to add the new constraints as dependecies 2015-04-23 11:16:39 +03:00
Adrian Costina dc2b37bd0c Makefile: Added top level Makefile. Modified behavior of clean and clean-all
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.

The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina 780455d68c Makefile: Updated makefiles. Added makefiles for altera 2015-04-09 17:57:06 +03:00
Rejeesh Kutty 5f8e9a74ea makefile: updated 2015-04-07 16:32:01 -04:00
Rejeesh Kutty 6d0a2bf64c axi_adcfifo: added 2015-04-07 16:21:39 -04:00
Rejeesh Kutty 4f7f109056 util_adcfifo: added 2015-04-07 16:08:38 -04:00
Adrian Costina f79a152958 Makefiles: updated all makefiles adding clean functionality 2015-04-03 11:57:54 +03:00
Rejeesh Kutty b6d5e21133 makefile: added 2015-04-01 16:29:02 -04:00
Rejeesh Kutty 0dc0d825a6 makefile: added 2015-04-01 16:29:01 -04:00
Rejeesh Kutty 283427647b makefile: added 2015-04-01 16:29:00 -04:00
Rejeesh Kutty 61293e7231 makefile: added 2015-04-01 16:28:58 -04:00
Rejeesh Kutty 73b31cfea0 makefile: added 2015-04-01 16:28:57 -04:00
Rejeesh Kutty cf85f0b0bb daq2/vc707: gpio_bd is 21bits 2015-03-26 14:18:26 -04:00
Rejeesh Kutty 90a8d91c36 daq2/vc707: 2014.4 updates 2015-03-26 14:02:43 -04:00
Rejeesh Kutty 17918bf735 daq2/vc707: 2014.4 updates 2015-03-26 14:02:39 -04:00
Rejeesh Kutty 6b1eac4211 daq2/vc707: 2014.4 updates 2015-03-26 14:02:34 -04:00
Rejeesh Kutty 6a85724793 daq2/vc707: 2014.4 updates 2015-03-26 14:02:31 -04:00
Rejeesh Kutty 5014b4209c kc705/vc707: consistency fixes 2015-03-26 14:02:10 -04:00
Rejeesh Kutty 276bb9525a daq2/kc705: 2014.4 updates 2015-03-26 10:14:12 -04:00
Rejeesh Kutty a7e3d2af67 daq2/kc705: 2014.4 updates 2015-03-26 10:14:12 -04:00
Rejeesh Kutty 803ef90fea daq2/kc705: 2014.4 updates 2015-03-26 10:14:12 -04:00
Rejeesh Kutty 3a2d1004b5 daq2: move intrs into ipi 2015-03-12 16:17:09 -04:00
Rejeesh Kutty b1b46ed820 daq2: move intrs into ipi 2015-03-12 16:17:04 -04:00
Rejeesh Kutty ff3dcbc2cb daq2: move intrs into ipi 2015-03-12 16:16:55 -04:00
Rejeesh Kutty 543bfe9d44 daq2/kcu105: removed hdmi/spdif 2015-03-10 16:15:16 -04:00
Rejeesh Kutty 59457cb3d4 daq2/zc706: base system updates 2015-03-09 16:10:56 -04:00
Rejeesh Kutty ce5ece5494 daq2/zc706: base system updates 2015-03-09 16:09:54 -04:00