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3 Commits (9ab4c0c7834dc3a050dc51015522e1e94b3afc0d)

Author SHA1 Message Date
Istvan Csomortani 03bec4b49c ad_fmclidar1_ebz: Interchange SYSREF and DEV_CLK ports location 
In ZCU102 LA01_CC_P|N are connected to regional clock, but in order to
receive a device clock properly we have to use pin which is connected
to a  global clock buffer. Luckily SYSREF is connected to global clock
pin; swap to port to receive the device clock correctly.

Also, swap the ports in both ZC706 and A10SOC carriers.
 2019-10-17 09:59:23 +03:00
Istvan Csomortani 3084a5d9aa ad_fmclidar1_ebz/a10soc: Fix the comment about the carrier re-work 
The project is using the FMCA connector of the board. Make sure that all
the carrier re-work is related to the FMCA connector.
 2019-10-17 09:58:52 +03:00
Istvan Csomortani 2344778dd8 ad_fmclidar1_ebz/a10soc: Initial commit 
Add initial support for Arria 10 SOC carrier.
 2019-10-02 15:32:17 +03:00