* Created the first level of pages for the User guide, from Analog Wiki:
* Architecture
* Build HDL
* Customize HDL
* Docs guidelines (edited)
* Git repository
* HDL coding guideline (edited)
* Introduction
* IP cores
* Porting projects (edited)
* Releases
* Third party
* Moved hdl_coding_guideline under user_guide and changed extension to rst
* Deleted hdl_pr_process.md
* docs_guideline: Add reference to project doc template
* porting_project:
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
Add documentation info to the README.md
At adi_hdl_parser.py, filter "_signal_clock" and "_signal_reset"
pseudo buses from component.xml files, append them as description
in the ports table, in the format
"{Bus} [...] is synchronous to this {domain}".
Also, adds collapsible directive
Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Moves guidelines to user_guide as docs_guidelines.
Includes Porting HDL project user guide.
Replaces the Excel spreadsheet with raw space divided files.
Includes the 6 pinned at the org.
Contributors shall expand the list as needed.
Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Iulia Moldovan
Jorge Marques