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13 Commits (9e4fb2d048eb69cfdc1c5970abce856216a6be20)

Author SHA1 Message Date
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Lars-Peter Clausen 6b9906b22b Refresh Makefiles 
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-05-21 14:21:54 +02:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file. 
Also fixed altera projects dependencies
 2015-05-18 17:22:46 +03:00
Adrian Costina 949abcdc8f Makefile: Updated makefiles so that the project recipe does not depend on lib 2015-05-06 14:58:29 +03:00
Adrian Costina dc2b37bd0c Makefile: Added top level Makefile. Modified behavior of clean and clean-all 
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.

The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
 2015-04-17 17:22:38 +03:00
Adrian Costina 780455d68c Makefile: Updated makefiles. Added makefiles for altera 2015-04-09 17:57:06 +03:00
Rejeesh Kutty 5f8e9a74ea makefile: updated 2015-04-07 16:32:01 -04:00
Adrian Costina f79a152958 Makefiles: updated all makefiles adding clean functionality 2015-04-03 11:57:54 +03:00
Istvan Csomortani 0162009099 cftl_cip: Update project to the new frame work. 2015-04-02 15:14:04 +03:00
Rejeesh Kutty 0664fb76f0 makefile: added 2015-04-01 16:28:51 -04:00
Istvan Csomortani 3113abf038 cftl_cip: Add gpio counter for CN0332 
Add a counter core to the design, to support the CN0332 pmod with a speed sensor.
Change a naming for the custom cores.
 2015-02-18 18:24:46 +02:00
Istvan Csomortani 2d607d765b cftl_cip: Add a clock input to the device core, for the SPI clock. 
This clock can be adjustable from the system_project.tcl
 2015-02-04 14:55:17 +02:00
Istvan Csomortani 659e0cca4e cftl_cip: Initial check in. 
Project cftl_cip supports the following Circuits from the Lab pmods:
 + EVAL-CN0350-PMDZ
 + EVAL-CN0335-PMDZ
 + EVAL-CN0336-PMDZ
 + EVAL-CN0337-PMDZ
Note: Additional testing needed!
 2015-01-23 18:29:32 +02:00