e0b7ef2f4f
scripts: Update scripts for PR design flow
...
+ Rewrite the pr_verify process, to improve verification time
+ Update the implementation flow: always the biggest logic will be implemented first, to achieve a better result
therefore force the tool to optimize the first logic with 'ExploreSequentialArea'
+ Make utilization report just from the PR pblock, that's more relevant as the utilization report of the whole fabric
2014-10-30 18:51:13 +02:00
02b32abefe
adv7511_zc702: Interrupt update
2014-10-30 18:42:14 +02:00
ba53e156e3
ZC702_base: Interrupt update
2014-10-30 18:39:49 +02:00
f595b86576
kcu105: lutram constraints for ies
2014-10-30 11:20:27 -04:00
d0a70380bf
kcu105: lutram constraints for ies
2014-10-30 11:19:55 -04:00
4c0e4d280f
dmafifo: internal version- light duty
2014-10-30 11:12:13 -04:00
360e7104b6
dmafifo: axi version- heavy duty
2014-10-30 11:12:12 -04:00
9818bcb601
axi_fifo2f: internal memory low overhead
2014-10-30 11:12:10 -04:00
17cb1d9585
common/mem: asymmetric version
2014-10-30 11:12:09 -04:00
6470ea91ad
axi_fifo2f: fake version
2014-10-30 11:12:08 -04:00
cfa1a93441
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-30 08:42:09 +01:00
56374cf592
usdrx1: Added synchronization, updated constraints, added timing check for a5gt project
2014-10-29 19:29:42 +02:00
cc265b6b9c
daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal
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For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-29 18:15:54 +01:00
f9628262aa
axi_dmac: Add xfer_req signal to the streamin AXI source interface
...
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-29 18:15:54 +01:00
8c789104a6
ad9671: Fixed constraints. Modified system_timing.tcl so that it will fail if timing are not met
2014-10-29 18:25:56 +02:00
fbce64411e
axi_ad9671: added synchronization interface to altera core
2014-10-29 18:20:26 +02:00
2e01ad2eec
ad9625_fmc/zc706: ps7 interrupt updates
2014-10-29 12:13:44 -04:00
b7946febfa
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-29 08:50:51 +01:00
f83622a2e6
daq2/kcu105: interrupt updates
2014-10-28 15:51:42 -04:00
4788d09620
vc707: interrupt updates
2014-10-28 15:42:55 -04:00
c9691fac64
ad9625_fmc: merge zc706 and vc707
2014-10-28 10:12:19 -04:00
627da6161b
ad9625_fmc: remove dma clock for now - zynq/non-zynq merge
2014-10-28 10:12:18 -04:00
36c7034bd6
ad7175: Fix dma issues
2014-10-28 16:00:06 +02:00
9c8fe5f09c
ad7175: Removed unused files
2014-10-28 14:30:41 +02:00
9e1d1c1b49
ad7175: Updated the AD7175 IP and project
2014-10-28 14:28:38 +02:00
fd66affa42
scripts: add default memory interconnect
2014-10-27 15:53:20 -04:00
fc4e002150
scripts: add mb cpu side
2014-10-27 15:53:19 -04:00
4f15f5c34c
adv7511: Update interrupts.
...
The ad_interrupts.v was used to concatenate the interrupts.
2014-10-27 19:48:05 +02:00
a870603db5
common_bd: Update the common block designs to the new IRQ path
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Avoid the use of xil_concat module by using the ad_interrupts.
2014-10-27 19:44:25 +02:00
b254380338
ad_interrupts: Initial check in.
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Initial check in of the interrupt concatenation block.
2014-10-27 19:34:34 +02:00
d04a545a41
fmcomms2: updated zc706 project with new constraint style
2014-10-27 19:27:36 +02:00
e086f5eb9f
axi_ad9361: Updated core with the new up_adc_common register set
2014-10-27 19:26:40 +02:00
61c769e035
kc705: daq2 updates
2014-10-27 09:59:57 -04:00
d1e3993bd0
kcu105: daq2 updates
2014-10-27 09:59:56 -04:00
d471b61f3e
fifo: merge zynq and non-zynq
2014-10-27 09:59:54 -04:00
8b4d70eac6
daq2: merge zc706 and kcu105
2014-10-27 09:59:53 -04:00
54f341fad8
scripts: sdk export before timing check
2014-10-27 09:59:52 -04:00
4494998940
scripts: ignore another variant of reset warning
2014-10-27 09:59:51 -04:00
10b898a62d
zed_base: Fix IRQ layout.
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Just a temporally fix of IRQ layout.
2014-10-27 14:46:26 +02:00
7e52cf9568
up_axi: timeout generating multiple/repeated acks
2014-10-23 13:51:33 -04:00
c54fc0758f
ad9434_fmc: Initial commit of ad9434
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Picked ad9434 library and project for ZC706 from hdl/dev branch.
2014-10-23 13:36:15 +03:00
3645139e59
fmcomms6: Avoiding redefinition of system clocks.
2014-10-23 12:55:56 +03:00
dd5d57843d
fmcomms6: Update version of the ILA core
2014-10-23 12:30:55 +03:00
3dbfa8cda6
ad9434_fmc: Fix PN monitor and device interrupt
2014-10-23 11:29:14 +03:00
24e11b30b9
ad7175_zed: added the ad7175 ZED project
2014-10-23 06:15:17 +03:00
b9ca616150
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-10-23 06:11:52 +03:00
da8454ae4c
axi_ad7175: Added the AD7175 IP
2014-10-23 06:11:41 +03:00
20d59ce39b
daq2: dma fifo modifications
2014-10-22 16:39:28 -04:00
4eeb50114f
daq2: rebase conflicts
2014-10-22 16:39:17 -04:00
43cdafe1e2
kcu105: iic-rstn removed
2014-10-22 16:33:52 -04:00
Istvan Csomortani
Rejeesh Kutty
Michael Hennerich
Adrian Costina
Lars-Peter Clausen
acozma