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5 Commits (a07d11c3e96bd7b6e0d67294e8736c1b95a2e78e)

Author SHA1 Message Date
Lars-Peter Clausen 1bb5b6e55f adv7511: zc706: Fix ddr and fixed_io signal names 
The toplevel input/output signal names are lower case, but the signals
connected to the system_wrapper are upper case. Since verilog is case
sensitive this leaves the toplevel input/output signals unconnected. Fix
this by using lower case names everywhere.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-04-23 14:33:47 +02:00
Istvan Csomortani b12187433d adv7511_zc706: Interrupts and framework updates 2015-03-20 13:30:24 +02:00
Istvan Csomortani 5bd00df33a adv7511_zc706: Interrupt update 2014-10-30 19:02:16 +02:00
Istvan Csomortani 4f15f5c34c adv7511: Update interrupts. 
The ad_interrupts.v was used to concatenate the interrupts.
 2014-10-27 19:48:05 +02:00
Rejeesh Kutty c89477be5a projects/adv7511: zynq boards 2014-03-03 10:16:49 -05:00