Commit Graph

11 Commits (a23ed6f715e56d428416f8ca63d11172f2b9dae3)

Author SHA1 Message Date
Iulia Moldovan c9a7d4d927 Add copyright and license to .tcl, .ttcl files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 15:22:26 +03:00
Iacob_Liviu 482f0489a3 scripts: Merge adi_env.tcl into a single file
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
Istvan Csomortani 363494ab9c library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
Laszlo Nagy e59e133663 util_dacfifo: set OOC default clock constraints
Out of Context constraints are needed for timing driven synthesis as for
avoiding critical warnings due clock queries.
The memory from the FIFO is inferred in different ways for high clock
speeds. Assume the highest frequency for all projects.
2019-04-22 10:27:16 +03:00
Istvan Csomortani 6044aa3956 util_dacfifo: Update the bypass logic 2018-10-11 16:57:30 +03:00
Adrian Costina dd69836473 util_dacfifo: Infer clock and reset signals 2018-04-11 15:09:54 +03:00
Istvan Csomortani bdd7e29bae util_dacfifo: Integrate grey coder/decoder module
The grey coder/decoder function was limited to 10 bits, and this
resulted an unwanted limitation of the FIFO size. Using this
module, the coder/decoder data width can be adjusted to the current
address width.
2017-10-05 12:25:50 +01:00
Istvan Csomortani c1bdfca4c3 library: Delete all adi_ip_constraint process call 2017-04-06 12:36:47 +03:00
Istvan Csomortani 69d721526a util_dacfifo: Add constraints file 2016-04-12 13:21:50 +03:00
Rejeesh Kutty c56b534ec0 dacfifo- remove interfaces 2015-08-27 11:18:00 -04:00
Rejeesh Kutty 056d6bbf40 dacfifo: added 2015-04-07 15:55:29 -04:00