Commit Graph

3 Commits (a6cb6b76721ac33fd0caa1e7dd980845f1faff37)

Author SHA1 Message Date
Istvan Csomortani bfa17844ff ad_serdes_in: General update
Added a parameter for option SDR / DDR mode, added a parameter for parallel data width.
Note: default IF_TYPE is SDR and default PARALLEL_WIDTH is 8
2014-10-07 17:42:27 +03:00
Istvan Csomortani 079ed0ffb3 ad_serdes_in: Update the serdes_in module
Add additional IDELAY block before the ISERDES. Delet the IDDR blocks. Be aware, the ISERDES block are running in DDR mode. If the interface is SDR the maximum parallel data width is 4.
2014-09-25 16:40:29 +03:00
Istvan Csomortani 27ffff827a common: Initial check in of ad_serdes_in.v
A generic serdes module for input interface, support both 6 and 7 series.
2014-09-24 18:34:40 +03:00