2 Commits (a74e2061e90d22ce959406d42bd9763d77ac0123)

Author	SHA1	Message	Date
Istvan Csomortani	a74e2061e9	ad7616_sdz: BUSY is input for the FPGA	2016-02-03 14:12:00 +02:00
Istvan Csomortani	118577f64f	ad7616_sdz: Add support for parallel interface	2016-01-28 12:38:22 +02:00