Commit Graph

8 Commits (a824bbfdbeea48d9d1f97f235e162087c1c799ae)

Author SHA1 Message Date
Iacob_Liviu 482f0489a3 scripts: Merge adi_env.tcl into a single file
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
Iulia Moldovan 0c0617d49e libraries: Update modules according to guideline
* Added header license for the files that didn't have
* Modified parentheses
* Removed extra spaces at the end of lines
* Fixed parameters list to be each parameter on its line
* Deleted lines after endmodule and consecutive empty lines
* Fixed indentation

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-06-28 18:06:56 +03:00
Nick Pillitteri c1721e18dd account for ADI_VIVADO_IP_LIBRARY global variable when adding subcores 2022-03-24 16:29:49 +02:00
LIacob106 076e81a17c library: Add link to wiki for IPs 2021-10-25 10:44:53 +03:00
AndreiGrozav 76cd5581bc axi_pwm_gen: Add config in soft reset option 2021-09-17 11:50:46 +03:00
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
AndreiGrozav 81320b6469 axi_pwm_gen: Fix offset mechanism
Fix offset for pwms with different periods.
The previous version was using an offset scheme based on pwm counter_0.
By using a separate offset counter the user will not be constrained by
pwm_0 period in regards with the offset of other pulses. In this version
offset 0 is used to delay pwm 0 in regards to the offset counter.

The offset counter will start after the load_config signal is asserted
and all active pwm counters finish the previous cycle or by a software
reset.

The software reset should also be used when using external_sync.
2021-07-13 15:49:42 +03:00
AndreiGrozav c235e5e583 axi_pwm_gen: Initial commit
axi_pwm_gen is based on util_pulse_gen, it introduces the option of
phase option between pulses(PWMs) and external synchronization.
Documentation available at
https://wiki.analog.com/resources/fpga/docs/axi_pwm_gen
2021-05-07 19:09:32 +03:00