Iulia Moldovan
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c9a7d4d927
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Add copyright and license to .tcl, .ttcl files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
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2023-07-25 15:22:26 +03:00 |
Bogdan Luncan
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e1af7837da
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ad9081: Parameters and header update
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
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2023-05-10 12:59:58 +03:00 |
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Bogdan Luncan
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73af87a324
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ad9081: Versal transceiver update
- Remove 4 lane limitation
- Adds support for RX or TX only instantiation
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
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2023-05-10 12:59:58 +03:00 |
LIacob106
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158c10df34
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projects: starndadize the jesd make parameters
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2022-09-13 11:53:21 +03:00 |
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Iacob_Liviu
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482f0489a3
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scripts: Merge adi_env.tcl into a single file
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
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2022-08-08 13:52:54 +03:00 |
Laszlo Nagy
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680d28476c
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ad9081_fmca_ebz: Add LANE_RATE param to all projects
The block design expects a lane rate to be set in the system project.
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2021-05-14 15:39:40 +03:00 |
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Laszlo Nagy
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d0f8a81b2f
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ad9081_fmca_ebz: Np 12 support
204B functional
204C functional
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2021-02-05 15:24:15 +02:00 |
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Laszlo Nagy
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ad755788a0
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ad9081_fmca_ebz/zc706: Initial version
M=8 L=4 SampleRate=250 MSPS
LaneRate=10 Gbps
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2020-11-12 15:46:27 +02:00 |