sergiu arpadi
|
acbbd4636a
|
sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
|
2021-01-20 01:02:56 +02:00 |
|
Sergiu Arpadi
|
d8ab27b2af
|
sysid: Remove cstring init string
|
2020-09-30 19:12:24 +03:00 |
Istvan Csomortani
|
6c2b1b1634
|
fmcomms5/zc702: Fix the sys_dma_clk connections
|
2020-06-19 12:53:18 +03:00 |
|
Arpadi
|
0680e44330
|
system_id: deployed ip
|
2019-08-06 16:53:11 +03:00 |
AndreiGrozav
|
235636a337
|
fmcomms5_zc702: Enable AXI_SLICE for the DMA
This will increase the timing margin for the design
|
2018-07-18 18:19:30 +03:00 |
|
Istvan Csomortani
|
c9eaa43b1e
|
fmcomms5: Update UP instantiations
|
2017-04-21 15:10:44 +03:00 |
Rejeesh Kutty
|
9b6dd27c23
|
ad9361- delay initialization
|
2017-03-15 12:06:59 -04:00 |
Adrian Costina
|
d198caa621
|
fmcomms2: Updated ZC702 design
|
2015-09-25 18:15:40 +03:00 |
|
Adrian Costina
|
51b5e4ddc5
|
fmcomms5: Moved the clock generation for dma transfer inside system_bd of the platform
|
2015-04-02 22:29:17 +03:00 |
|
Adrian Costina
|
e58e9bc701
|
fmcomms5: Updated zc702 project to the latest framework
|
2015-03-31 17:44:09 +03:00 |
|
Rejeesh Kutty
|
9a36075324
|
moved fmcomms5
|
2014-05-19 13:49:49 -04:00 |