Commit Graph

10 Commits (ab4ea30f6b98b97dac336dda11aefceb79350a78)

Author SHA1 Message Date
Iulia Moldovan c9a7d4d927 Add copyright and license to .tcl, .ttcl files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 15:22:26 +03:00
Iacob_Liviu 482f0489a3 scripts: Merge adi_env.tcl into a single file
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
Benjamin Menkuec 56a65b717c mark axi_gpreg.v as systemverilog, otherwise it gives an error with vivado 2022.1 2022-05-17 21:13:11 +03:00
Sergiu Arpadi 681ddc2e25 axi_gpreg: Add ttcl for clock_mon constraints
fixed critical warnings generated when the NUM_OF_CLK_MONS parameter
is set to 0 and the constraints written in up_clock_mon_constr.xdc
cannot be applied; removed up_clock_mon_constr.xdc from ip core.
2020-10-01 16:10:55 +03:00
sarpadi afb28280c2 axi_gpreg: added constraints for clock_mon module 2020-01-13 12:25:23 +02:00
Istvan Csomortani 363494ab9c library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
Istvan Csomortani 66bf92ec9f axi_gpreg: Use the common ad_rst constraints 2018-08-06 21:24:41 +03:00
Istvan Csomortani c1bdfca4c3 library: Delete all adi_ip_constraint process call 2017-04-06 12:36:47 +03:00
Rejeesh Kutty ad1cef1441 axi_gpreg: compile fixes 2015-11-03 14:29:00 -05:00
Rejeesh Kutty c8019b69fd axi_gpreg- added 2015-11-03 14:28:59 -05:00