Commit Graph

5 Commits (ad3198f623b4c3545ea27df101f3f08b70dcf889)

Author SHA1 Message Date
Lars-Peter Clausen 4ed7c9aee9 fmcomms2_pr: zc706: Fix ddr and fixed_io signal names
The toplevel input/output signal names are lower case, but the signals
connected to the system_wrapper are upper case. Since verilog is case
sensitive this leaves the toplevel input/output signals unconnected. Fix
this by using lower case names everywhere.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-23 14:33:47 +02:00
Istvan Csomortani fcbbfa0177 fmcomms2_pr ZC706: Update project to the new framework 2015-03-24 13:37:37 +02:00
Istvan Csomortani 766589637e prcfg_zc706: Update data width and project script 2014-11-18 10:05:53 +02:00
Istvan Csomortani 902d5b0da2 prcfg: Update fmcomms2_pr for ZC706 2014-08-05 17:55:31 +03:00
Istvan Csomortani 95701fbd0e fmcomms2_pr : PR initial check in 2014-07-10 10:41:48 +03:00