Commit Graph

419 Commits (adcd16d03339be35d88236595bf8038db406f334)

Author SHA1 Message Date
Adrian Costina 4634a4f868 vc707: Added linear flash to the base design 2014-11-05 17:18:40 +02:00
acozma f1c5173a12 motor_control: Renamed the project to motcon1_fmc 2014-11-05 09:51:18 +02:00
Paul Cercueil 0f1bc27e27 fmcadc3: Connect adc_dwr and dma_ready to ILAs
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-04 18:09:30 +01:00
Paul Cercueil d7ba7a95a6 fmcadc3: Update to use latest DDR3_fifo IP
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-04 18:09:30 +01:00
Istvan Csomortani 6c80d88a0c ad9625_vc707: Fix source file definition
The project using "p_sys_dmafifo" process, from sys_axi_dmafifo.tcl.
2014-11-04 15:21:25 +02:00
Rejeesh Kutty 80646a641b ad9625x2_fmc: constraints order changes 2014-11-03 15:02:35 -05:00
Rejeesh Kutty 56e65f5926 ad9625x2_fmc: add dma fifo 2014-11-03 15:02:00 -05:00
Rejeesh Kutty 8c0782cb74 ad9625x2_fmc: constraints changes 2014-11-03 15:01:40 -05:00
Rejeesh Kutty beee377fb7 ad9625x2_fmc: interrupts fix 2014-11-03 15:01:15 -05:00
Rejeesh Kutty 8e6cb2bad4 ad9625x2_fmc: dma fifo additions 2014-11-03 15:00:51 -05:00
Lars-Peter Clausen 7ad9340992 pmod_ad7175: Connect gain control pin
Connect the gain control pin to GPIO32 of the ZYNQ.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-03 15:00:02 +01:00
Paul Cercueil 4eea04cc9d fmcadc3: zc706: Fix DMA enable connection
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-03 14:45:16 +01:00
Istvan Csomortani 57137df018 fmcjesdadc1_zc706: Interrupt update 2014-11-03 13:02:09 +02:00
Istvan Csomortani 4f815b99a1 kc705_base: Fix sys_concat_intc input connections
All the unused input pins need to be connected to ground.
2014-11-03 13:02:08 +02:00
Istvan Csomortani 8ef3eada7d adv7511_ac701: Interrupt update 2014-11-03 13:02:07 +02:00
Istvan Csomortani 98b92c4bc1 adv7511_kc705: Interrupt update 2014-11-03 13:02:06 +02:00
Istvan Csomortani 0246a40e28 adv7511_vc707: Interrupt update 2014-11-03 13:02:05 +02:00
Istvan Csomortani f7588131da ac701_base: Interrupt update 2014-11-03 13:02:04 +02:00
Istvan Csomortani b92636c6eb kc705_base: Interrupt update 2014-11-03 13:02:03 +02:00
Adrian Costina 25f37ffce7 usdrx1: Added cpld configuration files 2014-11-03 12:54:54 +02:00
Rejeesh Kutty 99ad286c41 kcu105: adv7511 updates 2014-10-31 13:28:17 -04:00
Rejeesh Kutty 8ed9d10502 ad9625_fmc: disable sync 2014-10-31 13:05:18 -04:00
Adrian Costina 6f5a268909 fmcomms1: ZC706, updated project with latest constraints and interrupts 2014-10-31 17:59:56 +02:00
acozma a84397d345 motor_control: Changed the encoder pins mapping. 2014-10-31 17:37:28 +02:00
acozma 356e1c7ac1 motor_control: Changed the encoder pins mapping. 2014-10-31 17:08:18 +02:00
Adrian Costina 3c78d8fe58 ad9265_fmc: Added correct fifo to ILA. Updated interrupts 2014-10-31 14:49:29 +02:00
Adrian Costina 6fac294b6f fmcomms2: Updated zc706 project to new interrupt system 2014-10-31 14:15:29 +02:00
Istvan Csomortani 91ea11041d prcfg_mitx045: Upgrade of the project script.
- the design using the common PN monitor
 - the first implemented logic will be the qpsk, to get a better result
 - cosmetic changes
2014-10-31 12:18:00 +02:00
Istvan Csomortani e450e78f13 prcfg: Update design to Vivado 2014.2 2014-10-31 12:05:19 +02:00
Istvan Csomortani 860a7caa56 prcfg: dac and adc to dma interface width is 64 2014-10-31 12:04:34 +02:00
Istvan Csomortani ea194755e1 prcfg: Upgrade the QPSK logic
Regenerate the qpsk logic, with the new HDL coder, and modify the design to support the new files.
2014-10-31 11:59:29 +02:00
Istvan Csomortani 16cdae3001 mitx045_base: Delete unnecessary timing constraints. 2014-10-31 11:50:49 +02:00
Istvan Csomortani 07673b673a adv7511_mitx045: Interrupt update 2014-10-31 11:46:27 +02:00
Istvan Csomortani 67bec719f7 mitx045_base: Interrupt update 2014-10-31 11:45:33 +02:00
Paul Cercueil b9f800ff65 fmcadc3: zc706: Fix connection to the system clock
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-10-31 11:06:16 +01:00
Rejeesh Kutty 21f99b1c97 daq2: remove ila for kcu105 2014-10-30 15:26:29 -04:00
Rejeesh Kutty 56859ad4c9 sys_dmafifo: use internal memory 2014-10-30 15:26:28 -04:00
Istvan Csomortani 5bd00df33a adv7511_zc706: Interrupt update 2014-10-30 19:02:16 +02:00
Istvan Csomortani d81484a6f3 adv7511_zed: Interrupt update 2014-10-30 19:01:17 +02:00
Istvan Csomortani 7ae003cf82 zed_base: Interrupt update 2014-10-30 19:00:05 +02:00
Istvan Csomortani e0b7ef2f4f scripts: Update scripts for PR design flow
+ Rewrite the pr_verify process, to improve verification time
 + Update the implementation flow: always the biggest logic will be implemented first, to achieve a better result
    therefore force the tool to optimize the first logic with 'ExploreSequentialArea'
 + Make utilization report just from the PR pblock, that's more relevant as the utilization report of the whole fabric
2014-10-30 18:51:13 +02:00
Istvan Csomortani 02b32abefe adv7511_zc702: Interrupt update 2014-10-30 18:42:14 +02:00
Istvan Csomortani ba53e156e3 ZC702_base: Interrupt update 2014-10-30 18:39:49 +02:00
Rejeesh Kutty f595b86576 kcu105: lutram constraints for ies 2014-10-30 11:20:27 -04:00
Rejeesh Kutty d0a70380bf kcu105: lutram constraints for ies 2014-10-30 11:19:55 -04:00
Rejeesh Kutty 4c0e4d280f dmafifo: internal version- light duty 2014-10-30 11:12:13 -04:00
Rejeesh Kutty 360e7104b6 dmafifo: axi version- heavy duty 2014-10-30 11:12:12 -04:00
Michael Hennerich cfa1a93441 Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev 2014-10-30 08:42:09 +01:00
Adrian Costina 56374cf592 usdrx1: Added synchronization, updated constraints, added timing check for a5gt project 2014-10-29 19:29:42 +02:00
Lars-Peter Clausen cc265b6b9c daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal
For proper operation the xfer_req signal needs to be connected from the ADC DMA to the DDR FIFO.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-29 18:15:54 +01:00
Adrian Costina 8c789104a6 ad9671: Fixed constraints. Modified system_timing.tcl so that it will fail if timing are not met 2014-10-29 18:25:56 +02:00
Rejeesh Kutty 2e01ad2eec ad9625_fmc/zc706: ps7 interrupt updates 2014-10-29 12:13:44 -04:00
Michael Hennerich b7946febfa Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev 2014-10-29 08:50:51 +01:00
Rejeesh Kutty f83622a2e6 daq2/kcu105: interrupt updates 2014-10-28 15:51:42 -04:00
Rejeesh Kutty 4788d09620 vc707: interrupt updates 2014-10-28 15:42:55 -04:00
Rejeesh Kutty c9691fac64 ad9625_fmc: merge zc706 and vc707 2014-10-28 10:12:19 -04:00
Rejeesh Kutty 627da6161b ad9625_fmc: remove dma clock for now - zynq/non-zynq merge 2014-10-28 10:12:18 -04:00
acozma 36c7034bd6 ad7175: Fix dma issues 2014-10-28 16:00:06 +02:00
acozma 9e1d1c1b49 ad7175: Updated the AD7175 IP and project 2014-10-28 14:28:38 +02:00
Rejeesh Kutty fd66affa42 scripts: add default memory interconnect 2014-10-27 15:53:20 -04:00
Rejeesh Kutty fc4e002150 scripts: add mb cpu side 2014-10-27 15:53:19 -04:00
Istvan Csomortani 4f15f5c34c adv7511: Update interrupts.
The ad_interrupts.v was used to concatenate the interrupts.
2014-10-27 19:48:05 +02:00
Istvan Csomortani a870603db5 common_bd: Update the common block designs to the new IRQ path
Avoid the use of xil_concat module by using the ad_interrupts.
2014-10-27 19:44:25 +02:00
Adrian Costina d04a545a41 fmcomms2: updated zc706 project with new constraint style 2014-10-27 19:27:36 +02:00
Rejeesh Kutty 61c769e035 kc705: daq2 updates 2014-10-27 09:59:57 -04:00
Rejeesh Kutty d1e3993bd0 kcu105: daq2 updates 2014-10-27 09:59:56 -04:00
Rejeesh Kutty d471b61f3e fifo: merge zynq and non-zynq 2014-10-27 09:59:54 -04:00
Rejeesh Kutty 8b4d70eac6 daq2: merge zc706 and kcu105 2014-10-27 09:59:53 -04:00
Rejeesh Kutty 54f341fad8 scripts: sdk export before timing check 2014-10-27 09:59:52 -04:00
Rejeesh Kutty 4494998940 scripts: ignore another variant of reset warning 2014-10-27 09:59:51 -04:00
Istvan Csomortani 10b898a62d zed_base: Fix IRQ layout.
Just a temporally fix of IRQ layout.
2014-10-27 14:46:26 +02:00
Istvan Csomortani 3645139e59 fmcomms6: Avoiding redefinition of system clocks. 2014-10-23 12:55:56 +03:00
Istvan Csomortani dd5d57843d fmcomms6: Update version of the ILA core 2014-10-23 12:30:55 +03:00
Istvan Csomortani 3dbfa8cda6 ad9434_fmc: Fix PN monitor and device interrupt 2014-10-23 11:29:14 +03:00
acozma 24e11b30b9 ad7175_zed: added the ad7175 ZED project 2014-10-23 06:15:17 +03:00
Rejeesh Kutty 20d59ce39b daq2: dma fifo modifications 2014-10-22 16:39:28 -04:00
Rejeesh Kutty 4eeb50114f daq2: rebase conflicts 2014-10-22 16:39:17 -04:00
Rejeesh Kutty 43cdafe1e2 kcu105: iic-rstn removed 2014-10-22 16:33:52 -04:00
Michael Hennerich 43fe20d141 Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev 2014-10-22 17:19:37 +02:00
Istvan Csomortani dcdba475f7 vc707_common: Fix net name sys_100m_resetn 2014-10-22 15:41:36 +03:00
Adrian Costina a0d27a117c usdrx1: Updated project with new synchronization mechanism. Fixed timing constraints 2014-10-22 13:20:44 +03:00
Adrian Costina cd9033296c ad9671_fmc: Fixed constraint files 2014-10-22 13:14:59 +03:00
Istvan Csomortani 17675863e0 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
Istvan Csomortani 767179dce9 adv7511_zc706: Fix IRQ layout
Fix IRQ connection, this layout works on Linux
2014-10-21 17:44:28 +03:00
Michael Hennerich 2beaeb9176 projects/daq2/kcu105/system_constr.xdc: temp constrains
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-10-21 15:03:55 +02:00
Michael Hennerich 8a4ab4e05a projects/ad9434_fmc/common/ad9434_bd.tcl: Fix freeze - Design doesn't use SYNC
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-10-21 15:03:55 +02:00
Rejeesh Kutty d4a21d9775 ad9625_fmc: constraints fix 2014-10-20 10:00:39 -04:00
Istvan Csomortani b3c784f76a ad9467_fmc: Made some cosmetic changes on the block design script. 2014-10-20 13:28:34 +03:00
Istvan Csomortani 4b8720b551 fmcomms2_zc706: Remove top level constraints
Remove all the unnecessary top level constraint definitions.
2014-10-20 13:25:01 +03:00
Istvan Csomortani 7115864b4c ad9434_fmc: Remove top level constraints
Remove all the unnecessary top level constraint definitions.
2014-10-20 13:23:37 +03:00
Istvan Csomortani 5deffd57b1 zed: Remove top level constraints
Remove top level constraints from the ZED base design.
2014-10-20 13:20:27 +03:00
Istvan Csomortani 0c56e5b912 ad9434_fmc: Fix GPIO width
GPIO port width is 15 instead of 32
2014-10-20 10:59:30 +03:00
Rejeesh Kutty 7f8270d74b ad9625_fmc: generic dma fifo for zynq and non-zynq boards 2014-10-17 14:38:16 -04:00
Rejeesh Kutty 0b30f98640 ad9625_fmc/zc706: remove top level constraints 2014-10-17 14:38:15 -04:00
Rejeesh Kutty f3c9627cae adi_project: demote reset warnings to info 2014-10-17 14:38:13 -04:00
Rejeesh Kutty 14ccdaaa78 kcu105: removed spdif reset 2014-10-17 14:00:00 -04:00
Rejeesh Kutty 380eeec013 daq2/kcu105: ethernet fix 2014-10-17 13:48:35 -04:00
Rejeesh Kutty fca0714478 adv7511/kcu105: ethernet fix 2014-10-17 13:48:33 -04:00
Rejeesh Kutty e73b3b52dc kcu105: ethernet fix 2014-10-17 13:47:50 -04:00
Rejeesh Kutty 2600b1f359 daq3: tx interleave and dma fifo axi streaming 2014-10-15 14:51:04 -04:00