Commit Graph

61 Commits (afc4274ee385490fdaebada403ca1919ffa40729)

Author SHA1 Message Date
Adrian Costina 9d2b8809df Makefiles: Updated Makefiles 2015-10-23 10:44:27 +03:00
Adrian Costina 58ab70bc0e fmcomms1: Update AC701 project
Renamed mdio pin, as it's exported by the system wrapper
Renamed DMA parameter
2015-09-24 19:07:19 +03:00
Adrian Costina 70cea5b14e fmcomms1: Removed ILA 2015-09-16 18:51:40 +03:00
Istvan Csomortani d52308f074 axi_dmac: Change parameter name 2D_TRANSFER
Parameter name can't start with numbers, 2D_TRANSFER was changed to DMA_2D_TRANSFER
2015-08-20 10:14:22 +03:00
Istvan Csomortani 57cfb7cfb1 hdl/library: Update the IP parameters
The following IP parameters were renamed:

PCORE_ID --> ID
PCORE_DEVTYPE --> DEVICE_TYPE
PCORE_IODELAY_GROUP --> IO_DELAY_GROUP
CH_DW --> CHANNEL_DATA_WIDTH
CH_CNT --> NUM_OF_CHANNELS
PCORE_BUFTYPE --> DEVICE_TYPE
PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE
CHID --> CHANNEL_ID
PCORE_DEVICE_TYPE --> DEVICE_TYPE
PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N
PCORE_SERDES_DDR_N --> SERDES_DDR_N
PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE
DP_DISABLE --> DATAPATH_DISABLE
PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE
C_BIG_ENDIAN --> BIG_ENDIAN
C_M_DATA_WIDTH --> MASTER_DATA_WIDTH
C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH
NUM_CHANNELS --> NUM_OF_CHANNELS
CHANNELS --> NUM_OF_CHANNELS
PCORE_4L_2L_N -->QUAD_OR_DUAL_N
C_ADDRESS_WIDTH --> ADDRESS_WIDTH
C_DATA_WIDTH --> DATA_WIDTH
C_CLKS_ASYNC --> CLKS_ASYNC
PCORE_QUAD_DUAL_N --> QUAD_DUAL_N
NUM_CS --> NUM_OF_CS
PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID
PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID
PCORE_CLK0_DIV --> CLK0_DIV
PCORE_CLK1_DIV --> CLK1_DIV
PCORE_CLKIN_PERIOD --> CLKIN_PERIOD
PCORE_VCO_DIV --> VCO_DIV
PCORE_Cr_Cb_N --> CR_CB_N
PCORE_VCO_MUL --> VCO_MUL
PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC
PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH
PCORE_ADDR_WIDTH --> ADDRESS_WIDTH
DADATA_WIDTH --> DATA_WIDTH
NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS
DEBOUNCER_LEN --> DEBOUNCER_LENGTH
ADDR_WIDTH --> ADDRESS_WIDTH
C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED
Cr_Cb_N --> CR_CB_N
ADDATA_WIDTH --> ADC_DATA_WIDTH
BUFTYPE --> DEVICE_TYPE
NUM_BITS --> NUM_OF_BITS
WIDTH_A --> A_DATA_WIDTH
WIDTH_B --> B_DATA_WIDTH
CH_OCNT --> NUM_OF_CHANNELS_O
M_CNT --> NUM_OF_CHANNELS_M
P_CNT --> NUM_OF_CHANNELS_P
CH_ICNT --> NUM_OF_CHANNELS_I
CH_MCNT --> NUM_OF_CHANNELS_M
4L_2L_N --> QUAD_OR_DUAL_N
SPI_CLK_ASYNC --> ASYNC_SPI_CLK
MMCM_BUFIO_N --> MMCM_OR_BUFIO_N
SERDES_DDR_N --> SERDES_OR_DDR_N
CLK_ASYNC --> ASYNC_CLK
CLKS_ASYNC --> ASYNC_CLK
SERDES --> SERDES_OR_DDR_N
GTH_GTX_N --> GTH_OR_GTX_N
IF_TYPE --> DDR_OR_SDR_N
PARALLEL_WIDTH --> DATA_WIDTH
ADD_SUB --> ADD_OR_SUB_N
A_WIDTH --> A_DATA_WIDTH
CONST_VALUE --> B_DATA_VALUE
IO_BASEADDR --> BASE_ADDRESS
IO_WIDTH --> DATA_WIDTH
QUAD_DUAL_N --> QUAD_OR_DUAL_N
AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT
ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH
ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH
MODE_OF_ENABLE --> CONTROL_TYPE
CONTROL_TYPE --> LEVEL_OR_PULSE_N
IQSEL --> Q_OR_I_N
MMCM --> MMCM_OR_BUFR_N
2015-08-19 14:11:47 +03:00
Adrian Costina a7da779b94 Makefile: Updated Makefiles 2015-07-16 18:19:42 +03:00
Istvan Csomortani 46fa91d5be Makefile: Update Make files 2015-07-03 18:08:57 +03:00
Lars-Peter Clausen 6862655b0d Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Adrian Costina f01ba54c5f fmcomms1: Fixed mdc_mdio connection for kc705 2015-06-18 11:06:33 +03:00
Adrian Costina 97ab5e0ef7 fmcomms1: Update project to integrate the new util_wfifo 2015-06-10 15:16:17 +03:00
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Lars-Peter Clausen 6b9906b22b Refresh Makefiles
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Adrian Costina 91279253ef Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile 2015-05-08 15:31:40 +03:00
Adrian Costina 949abcdc8f Makefile: Updated makefiles so that the project recipe does not depend on lib 2015-05-06 14:58:29 +03:00
Adrian Costina 4f75414a1a fmcomms1: Removed constraints that are not needed 2015-05-05 23:39:08 +03:00
Adrian Costina 1fcaf8fb63 fmcomms1: Updated AC701 project to meet timing. Reduced FIFO size for AD9643 DMA to 8 2015-05-05 23:37:01 +03:00
Adrian Costina 3fdda617a4 fmcomms1: updated common, changed DMAC fifo size and wfifo reset signal source
- changed DMAC FIFO size to 16, as it should be large enough
- connected wfifo reset to adc_rst from axi_ad9643 core
2015-04-28 14:58:04 +03:00
Adrian Costina dc2b37bd0c Makefile: Added top level Makefile. Modified behavior of clean and clean-all
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.

The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina 780455d68c Makefile: Updated makefiles. Added makefiles for altera 2015-04-09 17:57:06 +03:00
Rejeesh Kutty 5f8e9a74ea makefile: updated 2015-04-07 16:32:01 -04:00
Adrian Costina f79a152958 Makefiles: updated all makefiles adding clean functionality 2015-04-03 11:57:54 +03:00
Adrian Costina 243a9bc992 fmcomms1: AC701 update project to new framework 2015-04-02 15:30:02 +03:00
Rejeesh Kutty 48e8945ac1 makefile: added 2015-04-01 16:29:29 -04:00
Rejeesh Kutty 1c1464876c makefile: added 2015-04-01 16:29:28 -04:00
Rejeesh Kutty 56615a19f2 makefile: added 2015-04-01 16:29:27 -04:00
Rejeesh Kutty 1a14a36db6 makefile: added 2015-04-01 16:29:26 -04:00
Rejeesh Kutty c085fbdd35 makefile: added 2015-04-01 16:29:24 -04:00
Rejeesh Kutty 077d2699fe makefile: added 2015-04-01 16:29:23 -04:00
Rejeesh Kutty d50bf705ef makefile: added 2015-04-01 16:29:22 -04:00
Adrian Costina 7aeeaec5f4 fmcomms1: VC707 updated to the latest framework 2015-03-30 18:09:57 +03:00
Adrian Costina 89b83f8a00 fmcomms1: KC705 project updated to the latest framework 2015-03-30 18:09:17 +03:00
Adrian Costina 01f8c373b0 fmcomms1: Updated zc702 project to the latest framework 2015-03-27 15:38:46 +02:00
Adrian Costina dbcf8389b3 fmcomms1: Updated zed project to the latest framework 2015-03-27 15:37:50 +02:00
Adrian Costina 10f3ac4d22 fmcomms1: Updated common and ZC706 project to the latest flow 2015-03-25 17:41:14 +02:00
Lars-Peter Clausen abde4048e0 fmcomms1: Add extra AXI slice on ADC DMA path
Add a extra AXI slice on the ADC DMA data path to the HP interconnect to
improve the timing.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-02-20 16:43:45 +01:00
Adrian Costina 47871287f3 kc705: Updated base project with linear flash. Updated all depending projects 2015-01-13 10:19:07 +02:00
Adrian Costina 2e72a2cc0c fmcomms1: Updated VC707 project with latest interrupts and linear flash. Fixed constraints and constraint priority 2014-11-25 15:00:00 +02:00
Adrian Costina dbc9da8598 fmcomms1: Updated KC705 project with latest interrupts. Fixed constraints and constraint priority 2014-11-25 14:56:22 +02:00
Adrian Costina 87324d8a14 fmcomms1: Updated AC701 project with latest interrupts. Fixed constraints and constraint priority 2014-11-25 14:54:01 +02:00
Adrian Costina b8ab2ff847 fmcomms1: updated common project
- increased the DMA FIFOs to 64
- added axi slices to the source and destination for DMAs
- for microblaze systems, increade the ad9643 dma data width at destination
- removed sys_fmc_dma_clk and used the sys_200m_clk instead for DMA data transfer
2014-11-25 14:51:42 +02:00
Adrian Costina 01b3495a81 fmcomms1: Updated ZC706 project to be compatible with util_wfifo and increased system_constr.xdc priority 2014-11-17 18:33:21 +02:00
Adrian Costina 20a3f322e7 fmcomms1: Updated zc702 project
- fixed timing constraints, increased system_constr.xdc priority
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:32:12 +02:00
Adrian Costina adcd16d033 fmcomms1: Updated zed project
- fixed timing constraints
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:31:24 +02:00
Adrian Costina 6f5a268909 fmcomms1: ZC706, updated project with latest constraints and interrupts 2014-10-31 17:59:56 +02:00
Istvan Csomortani 17675863e0 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
Lars-Peter Clausen 4d4a7981f2 fmcomms1: Connect DMA controller directly to the HP ports
The AXI DMAC controller nativly supports AXI3, there is no need to insert a interconnect to do protocol conversion.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:46:07 +03:00
Adrian Costina 89964be59e fmcomms1: Updated project to vivado 2014.2 2014-09-30 10:32:18 +03:00
Adrian Costina 3c25c1171d fmcomms1: Fixed missing sample issue on ZC706. Added modifications for all other platforms 2014-09-26 10:28:07 -04:00
Rejeesh Kutty fe1eaefcff fmcomms1: zc706 2014-08-22 09:08:55 -04:00