zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
5,679 Commits
1 Branch
0 Tags
23 MiB
Commit Graph

5 Commits (b080b52a143e3f98e00f040cd5dbd265814c872c)

Author SHA1 Message Date
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific 
Updated all system_project and Makefiles
 2020-11-02 16:13:35 +02:00
Laszlo Nagy 4026eaa19b ad9081_fmca_ebz: Fix device clocks termination 
The device clocks are AC coupled LVDS lines without external termination.
For proper operation internal differential termination must be enabled,
the DQS_BIAS will DC bias the AC coupled signal to VCCO/2 (1.8/2) 0.9V
 2020-10-06 16:13:21 +03:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Laszlo Nagy 7df4caf8b0 ad9081_fmca_ebz: Added parameter description 
Add parameter description to project and common block design file
 2020-04-23 17:21:05 +03:00
Laszlo Nagy f3a7fd8b0d ad9081_fmca_ebz:zcu102: initial version 2020-03-10 18:19:03 +02:00