zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
2,366 Commits
1 Branch
0 Tags
23 MiB
Commit Graph

1399 Commits (b17fec689e15fb9a2f3960c87c5b59186387ed46)

Author SHA1 Message Date
Istvan Csomortani f77f928444 fmcomms2/zed: Fix the system_top 
Fix the enable/txnrx control line.
 2015-09-25 19:11:41 +03:00
Istvan Csomortani aeb1d7aa3e fmcomms2/zed: Cosmetic changes 2015-09-25 19:11:39 +03:00
Istvan Csomortani f8b3096bd0 fmcomms2/vc707: Fix the system_top 
Fix the enable/txnrx control lines.
 2015-09-25 19:11:37 +03:00
Istvan Csomortani 2c75cfd04e fmcomms2/vc707: Cosmetic changes 2015-09-25 19:11:35 +03:00
Istvan Csomortani ffa0bcd19f fmcomms2/mitx045: Fix the system_top 
Fix the enable/txnrx control lines.
 2015-09-25 19:11:32 +03:00
Istvan Csomortani 28d20e84c5 fmcomms2/zc702: Fix the system_top 
Fix the enable/txnrx control lines.
 2015-09-25 19:11:30 +03:00
Istvan Csomortani ea74413125 fmcomms2/kc705: Fix the system_top. 
Fix the enable/txnrx control lines.
 2015-09-25 19:11:28 +03:00
Istvan Csomortani f80622b972 fmcomms2/ac701: Fix the system_top 
Fix the enable/txnrx control line.
 2015-09-25 19:11:26 +03:00
Istvan Csomortani 07e2d281c0 Make: Update Make files 2015-09-25 19:11:21 +03:00
Istvan Csomortani 1604e88242 fmcadc4: Update project to the new JESD interface framework 2015-09-25 19:11:19 +03:00
Istvan Csomortani f4b432da08 fmcadc4: Update to 2015.2 2015-09-25 19:11:17 +03:00
Istvan Csomortani 4f99bdd93f fmcadc5: Update project 
+ Update the JESD IP core for Vivado 2015.2
+ Update the framework for JESD interface
 2015-09-25 19:11:14 +03:00
Istvan Csomortani f5b5bbfbca fmcomms7: Update to the new JESD framework 
Update project to the new framework for JESD interface and add a DAC FIFO to the transmit path.
 2015-09-25 19:11:12 +03:00
Istvan Csomortani fbd51c2734 fmcomms7: Update to 2015.2 
Update IP core version of jesd204.
 2015-09-25 19:11:10 +03:00
Adrian Costina d198caa621 fmcomms2: Updated ZC702 design 2015-09-25 18:15:40 +03:00
Istvan Csomortani 4b115fbe69 ad9467_fmc: Delete ILA from the design 2015-09-25 17:41:46 +03:00
Adrian Costina 7853843036 fmcomms5: Update ZC706 project 2015-09-25 17:32:29 +03:00
Adrian Costina 108ffebae4 fmcomms5: Updated project to 2015.2.1 
- added cpack / upack
 2015-09-25 17:31:08 +03:00
Adrian Costina 848b51699c fmcadc2: Updated VC707 project 2015-09-25 17:28:15 +03:00
Adrian Costina e764f54426 fmcadc2: Updated ZC706 project 2015-09-25 17:26:54 +03:00
Adrian Costina 6fbd8dd9a5 fmcadc2: Update projecct to 2015.2.1 
- updated to the new jesd framework
 2015-09-25 17:25:32 +03:00
Adrian Costina ab4b73fd32 ad6676evb: Updated VC707 project 2015-09-25 16:07:22 +03:00
Adrian Costina 33390c85f8 ad6676evb: Update ZC706 project 2015-09-25 14:46:02 +03:00
Adrian Costina a49230ec07 ad6676evb: Updated project to 2015.2.1 
- updated to the new jesd framework
- added cpack core
 2015-09-25 14:44:46 +03:00
Adrian Costina 7f9c526683 fmcjesdadc1: VC707 update project 2015-09-24 19:50:14 +03:00
Adrian Costina 78fe05120b fmcjesdadc1: Updated KC705 project 2015-09-24 19:14:48 +03:00
Adrian Costina 70c7c2aeb8 fmcjesdadc1: Updated ZC706 project 2015-09-24 19:14:05 +03:00
Adrian Costina 2ed161628d fmcjesdadc1: Updated project to 2015.2.1 
- updated to the new jesd framework
- added cpack core
 2015-09-24 19:12:40 +03:00
Adrian Costina 58ab70bc0e fmcomms1: Update AC701 project 
Renamed mdio pin, as it's exported by the system wrapper
Renamed DMA parameter
 2015-09-24 19:07:19 +03:00
Rejeesh Kutty f9801e8c85 pzsdr/cc*- rf card on fmc only 2015-09-23 09:16:41 -04:00
Rejeesh Kutty 9832ea95a8 pzsdr/ccpci- initial version 2015-09-22 16:30:27 -04:00
Rejeesh Kutty 14bccb6062 pzsdr/ccfmc- rf card/tdd only on fmc 2015-09-22 15:54:53 -04:00
Rejeesh Kutty fa5d879fdb pzsdr/ccpci -- updates 2015-09-21 14:54:31 -04:00
Rejeesh Kutty fce96099ab unused eth1 clocks 2015-09-21 14:54:31 -04:00
Rejeesh Kutty 0702f2c231 ccpci- added 2015-09-21 09:31:18 -04:00
Rejeesh Kutty 3a72d26f5b pzsdr- pci carrier 2015-09-18 21:18:16 -04:00
Rejeesh Kutty 9f8433159f pzsdr- name changes 2015-09-18 16:24:27 -04:00
Rejeesh Kutty 0d232a270a pzsdr- breakout + fmc updates 2015-09-18 15:34:56 -04:00
Rejeesh Kutty 3bd2bc4071 pzsdr- breakout + fmc updates 2015-09-18 15:34:36 -04:00
Rejeesh Kutty 25f3f05c22 pzsdr- breakout + fmc updates 2015-09-18 15:33:50 -04:00
Rejeesh Kutty 93b928033b ccbrk- added 2015-09-18 13:24:26 -04:00
Rejeesh Kutty caec400378 pzsdr- make module default 2015-09-18 13:22:01 -04:00
Rejeesh Kutty 236854c26f pzsdr-cc-fmc updates 2015-09-18 12:46:42 -04:00
Rejeesh Kutty f970bf1786 pzsdr fmc carrier 2015-09-18 11:50:08 -04:00
Rejeesh Kutty b3a4f11e97 rfsom to pzsdr 2015-09-18 11:48:30 -04:00
Rejeesh Kutty 0386bedff9 fmc carrier is -- ccfmc 2015-09-18 11:45:56 -04:00
Rejeesh Kutty 92533bc24d fmc carrier is -- ccfmc 2015-09-18 11:45:15 -04:00
Rejeesh Kutty 48af5f29de rfsom renamed to pzsdr 2015-09-18 11:19:50 -04:00
Rejeesh Kutty 3ef94d559c rfsom renamed to pzsdr 2015-09-18 11:18:59 -04:00
Rejeesh Kutty 52d3f189a0 rfsom renamed to pzsdr 2015-09-18 11:18:01 -04:00
Rejeesh Kutty e2886eaa44 pzpcie- updates 2015-09-18 11:10:48 -04:00
Rejeesh Kutty 379f788c8c pzpcie- added 2015-09-18 11:10:48 -04:00
Lars-Peter Clausen 9e68357af5 usdrx1: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:19 +02:00
Lars-Peter Clausen 275830d2b1 motcon2_fmc: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:17 +02:00
Lars-Peter Clausen 8d179235f8 imageon: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:14 +02:00
Lars-Peter Clausen 9210e1d58a fmcomms7: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:11 +02:00
Lars-Peter Clausen 39b032b868 fmcomms5: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:09 +02:00
Lars-Peter Clausen cd8b467b1e fmcomms2: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:07 +02:00
Lars-Peter Clausen 7e2255f4d9 fmcjesdadc1: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:05 +02:00
Lars-Peter Clausen dd79dfdc12 fmcadc5: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:03 +02:00
Lars-Peter Clausen 7f5a22a75f fmcadc4: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:28:01 +02:00
Lars-Peter Clausen 60490c4e2b fmcadc2: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:59 +02:00
Lars-Peter Clausen 6c7316fbd0 daq3: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:56 +02:00
Lars-Peter Clausen 7184827d68 daq2: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:54 +02:00
Lars-Peter Clausen f1fb599eb1 cn0363: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:51 +02:00
Lars-Peter Clausen 6d87f537da cftl_cip: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:49 +02:00
Lars-Peter Clausen 1c603b830e ad9467_fmc: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:47 +02:00
Lars-Peter Clausen 960c711f3b ad9434_fmc: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:44 +02:00
Lars-Peter Clausen 7be1f62b8b ad9265_fmc: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:25 +02:00
Lars-Peter Clausen 0f553a08e8 ad6676evb: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:21 +02:00
Adrian Costina 0021c7869d kc705: Deactivated narrow burst support, as it's not needed 2015-09-16 19:02:17 +03:00
Adrian Costina 70cea5b14e fmcomms1: Removed ILA 2015-09-16 18:51:40 +03:00
Adrian Costina 63aaa58861 ad9265_fmc: Updated project, removed ILA related clocks 2015-09-11 11:27:58 +03:00
Istvan Csomortani a679251d7d Makefiles: Update Make 2015-09-09 17:13:19 +03:00
Istvan Csomortani f3eca48533 pzsdr_rfsom: Update project with the new TDD sync interface 2015-09-09 12:37:52 +03:00
Istvan Csomortani 510f1cfdd9 fmcomms2_zc706: Update project with the new TDD sync interface 2015-09-09 12:35:22 +03:00
Adrian Costina f428d8bde9 adv7511: KC705, updated design so that the axi_hdmi_dma core has memory connection datawidth of 512 2015-09-08 16:43:40 +03:00
Adrian Costina d81d8238a9 kc705: Updated mig project file 2015-09-08 16:42:23 +03:00
Adrian Costina 2757cd8baf adv7511: AC701 fixed system top 2015-09-07 16:48:10 +03:00
Rejeesh Kutty 214f5b18c1 no-trace option 2015-09-03 16:16:31 -04:00
Rejeesh Kutty 00a55ded00 ibert to jesd-gt change 2015-09-03 16:16:30 -04:00
Rejeesh Kutty 77ee3c4cbc ibert to jesd-gt change 2015-09-03 16:16:28 -04:00
Rejeesh Kutty dbf7c154b2 no-trace option 2015-09-03 16:16:27 -04:00
Rejeesh Kutty e2aca435e5 ibert-to-jesd-gt change 2015-09-03 16:16:25 -04:00
Rejeesh Kutty f1d416a98b daq2/a10gx- ethernet fix 2015-09-02 14:31:15 -04:00
Rejeesh Kutty 1fff1076b1 daq2/a10gx- ethernet fix 2015-09-02 14:31:15 -04:00
Rejeesh Kutty 01c0fdc809 daq2/a10gx- ethernet fix 2015-09-02 14:31:15 -04:00
Istvan Csomortani 1ecd615f92 common/mitx045 : Fix the vdma interface of axi_hdmi_core 2015-09-02 16:33:30 +03:00
Lars-Peter Clausen 9fb336e464 usdrx1: Add DDR FIFO 
The converters on the usdrx1 generate 2.5GB/s. This more than we can
transport over the HP interconnects to the system memory.

Add a dedicated DDR FIFO to design which can be used to buffer the data
before it is transferred to the main memory.

Also increase the interconnect clock rate from 100MHz to 200MHz and the DMA
FIFO size from 4 to 8, so we can transfer the captured data faster to the
main memory.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-01 11:29:36 +02:00
Lars-Peter Clausen bbada6ed8f usdrx1: Add overflow flag to ILA 
It's useful to know if and when a overflow happens.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-01 11:29:36 +02:00
Lars-Peter Clausen c67aecc1eb usdrx1: Disable SYNC_TRANSFER_START for the DMA 
There is no sync signal in this design, so the flag needs to be set to 0.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-01 11:29:36 +02:00
Rejeesh Kutty 9b37d6bfe7 pzslb- updates - wip 2015-08-31 15:41:29 -04:00
Rejeesh Kutty 49430dc2b0 pzslb- copy 2015-08-31 15:41:27 -04:00
Rejeesh Kutty 879a75a690 pzslb- copy 2015-08-31 15:41:26 -04:00
Rejeesh Kutty fdc3dbb805 pzslb- copy 2015-08-31 15:41:25 -04:00
Rejeesh Kutty fc79af6edc pzslb- common 2015-08-31 15:41:24 -04:00
Rejeesh Kutty f005de9ee2 pzslb- added 2015-08-31 15:41:23 -04:00
Rejeesh Kutty a67ae238f8 rfsom-ps7- ddr settings 2015-08-31 15:39:45 -04:00
Rejeesh Kutty 212235189f hdmi-tx- signal name changes 2015-08-28 13:48:33 -04:00
Rejeesh Kutty 0e20277bc1 hdmi-tx- signal name changes 2015-08-28 13:48:33 -04:00