Commit Graph

18 Commits (b206f8f37a8fc18c6539adae7335596df08c998c)

Author SHA1 Message Date
Istvan Csomortani 1c23cf4621 all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00
Istvan Csomortani c1bdfca4c3 library: Delete all adi_ip_constraint process call 2017-04-06 12:36:47 +03:00
Istvan Csomortani c46989e4e8 Makefile: Update Makefiles for libraries 2017-03-30 18:33:22 +03:00
Istvan Csomortani 873fbfd6d7 library: Update scripts with new constraints
Update all IPs tcl scripts with the new constraints files.
Refer to commit 335fef0.
2017-03-30 16:16:02 +03:00
Adrian Costina 8ebc8fe4e2 updated makefiles 2016-12-09 23:06:41 +02:00
Rejeesh Kutty b85a282748 fmcomms11- lane swap 2016-11-16 10:26:47 -05:00
AndreiGrozav 9d6c93a5d8 Fix warnings 2016-11-14 15:17:15 +02:00
Istvan Csomortani 8dbfe9258f axi_ad9162: Delete duplicated port 2016-10-21 13:47:01 +03:00
AndreiGrozav 43ee917d53 Add up_dac_channel missing connections 2016-10-12 13:20:26 +03:00
Rejeesh Kutty c98e2e95dd ad9162- xcvr updates 2016-09-26 15:21:45 -04:00
Rejeesh Kutty f6c7aa9005 library- dac parameter changes 2016-09-23 16:15:59 -04:00
Istvan Csomortani 913eafed48 up_drp : Update the DRP interface to support Altera platforms 2016-09-21 15:00:45 +03:00
Istvan Csomortani 0cd608a7e2 lib_refactoring: Update Make files 2016-08-08 16:38:38 +03:00
Istvan Csomortani df36902713 lib_refactoring: Fix path of the IO macros 2016-08-08 15:07:19 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty 3a1ecb7463 ad9162- support iq mode 2016-07-21 11:58:03 -04:00
Rejeesh Kutty 48762519b5 make updates 2016-07-06 15:02:00 -04:00
Shrutika Redkar d931b2ee64 ad9162 core verilog files 2016-06-30 10:24:01 -04:00