Commit Graph

3 Commits (b21fb3a0e0d9a59d37970d4e0c2145a61ca72f10)

Author SHA1 Message Date
Laszlo Nagy 044017e0b9 ad9081_fmca_ebz/zcu102: Make second sync CMOS and GPIO controllable 2022-05-11 18:09:08 +03:00
Laszlo Nagy 4026eaa19b ad9081_fmca_ebz: Fix device clocks termination
The device clocks are AC coupled LVDS lines without external termination.
For proper operation internal differential termination must be enabled,
the DQS_BIAS will DC bias the AC coupled signal to VCCO/2 (1.8/2) 0.9V
2020-10-06 16:13:21 +03:00
Laszlo Nagy f3a7fd8b0d ad9081_fmca_ebz:zcu102: initial version 2020-03-10 18:19:03 +02:00