Commit Graph

2640 Commits (b2d86bab470de365789ea35ff8d57de59266b391)

Author SHA1 Message Date
Laszlo Nagy c37b24d00f fmcadc5: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Laszlo Nagy 4ec1204767 fmcadc4: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Laszlo Nagy 51e35e081f fmcadc2: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Laszlo Nagy 27f1e4eaed daq3: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Laszlo Nagy 9b048f1a0e daq2: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Laszlo Nagy b98eb28dca adrv9371: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Laszlo Nagy 3183fbf226 adrv9009: update adcfifo/dacfifo 2019-01-23 14:45:45 +02:00
Laszlo Nagy bed5ce516c adcfifo/dacfifo: fix alignments 2019-01-23 14:45:45 +02:00
Laszlo Nagy a3766b464b adcfifo/dacfifo: Use proc to create infrastructure
Create the dacfifo/adcfifo infrastructure with procedures.
This will allow moving the parameters of the dac/adcfifo inside
the block design so it can be calculated based on other parameters.
2019-01-23 14:45:45 +02:00
Laszlo Nagy e864786d3a adrv9371: use generic TPL
Use the generic TPLs for a better scalability to ease lane number
reductions.
2019-01-14 17:21:00 +02:00
Laszlo Nagy 0b66b39352 adrv9009/zc706: make SPI selection consistent 2018-12-21 17:32:48 +02:00
Laszlo Nagy 3d7a376f8b Makefile: update makefiles 2018-12-21 17:32:48 +02:00
Laszlo Nagy c9f1c92eaa adrv9009: use generic TPL
Make the block design parametrizable.
Limitations:
  F = 1,2,4
2018-12-21 17:32:48 +02:00
Laszlo Nagy 47093775ae adrv9009/zc706: top level cleanup 2018-12-21 17:32:48 +02:00
Laszlo Nagy 8adc285eab adrv9009/zc706: fix location constraints 2018-12-21 17:32:48 +02:00
Laszlo Nagy 7a5a8c5340 Revert "adrv9009: Removed ZC706 based project"
This reverts commit 7e7f75c0270bb6793bedb339f62b67bab9d77a6e.
2018-12-21 17:32:48 +02:00
AndreiGrozav f5af939c04 Add adi make(build) scripts
adi_make.tcl
  -adi_make::lib
  -adi_make::boot_bin (executes the script adi_make_boot_bin in xsct)
adi_make_boot_bin.tcl
2018-12-11 14:02:11 +02:00
Laszlo Nagy d8e11cfce5 daq2/3: update DAC TPL base addresses
The TPL for DACs can be relocated to addresses which match the software
expectations.
2018-12-04 14:02:22 +02:00
Adrian Costina e09f3290ff adrv9009: Move intel project to upack2/cpack2 2018-12-03 12:23:24 +00:00
Lars-Peter Clausen bf50916a3f motocon: Use new pack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen da50d682c5 ad6766evb: Use new pack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen 9b919636ca fmcjesdadc1: Use new pack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen 1d223c19f8 fmcadc4: Use new pack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen 1375dcfeaa daq3: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen b9958cac00 daq2: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen 76f6428bfc usrpe31x: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen aed8478d10 adrv9371x: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen 2462f8e50f adrv9009: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Matt Fornero 3052c28c01 adrv9364: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Matt Fornero <matt.fornero@mathworks.com>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Matt Fornero 0a67746352 adrv9361: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Matt Fornero <matt.fornero@mathworks.com>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen f79039b4d4 fmcomms5: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen 27c3231c1b arradio: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Lars-Peter Clausen 078a7fffc8 fmcomms2: Use new pack/unpack infrastructure
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-28 11:33:11 +02:00
Adrian Costina 401395cdd1 adrv9009: A10GX: Initial commit 2018-11-27 15:31:21 +02:00
Adrian Costina 70fe72da16 a10soc: Common, increase SPI frequency to 10MHz 2018-11-27 15:31:21 +02:00
Adrian Costina e4048c7b04 adrv9009: A10SOC: Add second observation channel 2018-11-27 15:31:21 +02:00
Adrian Costina 52085c1739 a10soc: set "FORCE ALL USED TILES TO HIGH SPEED" 2018-11-27 15:31:21 +02:00
Adrian Costina f12bd3d246 adrv9009: A10SOC: Initial commit 2018-11-27 15:31:21 +02:00
Istvan Csomortani 559e00fd75 adrv9009/zcu102: Increase DAC buffer depth to 18Mb 2018-10-11 16:57:30 +03:00
Istvan Csomortani 10deddd6d2 adrv9371/zcu102: Tune the differential swing of the TX lines 2018-10-04 14:37:02 +03:00
Istvan Csomortani cff8341c18 daq3/zcu102: Add custom configuration for CPLL
To support 12.33 Gbps add a custom configuration for the CPLLs.
2018-10-04 14:37:02 +03:00
Istvan Csomortani 1931d65b7a adrv9009/zcu102: Update initial configuration for GT clock output control 2018-10-04 14:37:02 +03:00
Laszlo Nagy 4ce153e6e1 all/system_top.v: loopback gpio lines
Create loopback on unused GPIO lines since Linux may rely on it.
2018-10-04 14:19:37 +03:00
Istvan Csomortani 2b868c2857 adi_project.tcl: Update the ZCU102 board preset version 2018-10-03 15:54:29 +03:00
Istvan Csomortani bbb72d2c7e fmcomms2/zc702: Modify implementation strategy to Performance Exlpore
When we improve timing by modifying the implementation strategies,
the general rule of thumb is "less is always more".

Timing did not fail in synthesis, so we leaving the synthesis
strategy in default.
After several parallel runs with various strategies, the
"Performance_Explore" strategy gave the best result for
implementation.
2018-09-27 11:46:12 +03:00
AndreiGrozav b0b149244b daq2_kcu105: Change implementation strategy
Use Performance_Retiming strategy to meet timing.
2018-09-27 11:45:52 +03:00
AndreiGrozav 9c6da0ff45 zed, zc702, zc706, ccfmc: Send video trough axis interface 2018-09-27 11:45:28 +03:00
Lars-Peter Clausen 97409dcb88 adi_board.tcl: ad_xcvrcon: Fix width of sync port for multi-link setups
Each individual link of a multi-link has its own sync signal. The top level
sync port that is created by the ad_xcvrcon function is always a single bit
single though.

This results in only the sync signal of the first link being routed while
others are ignored.

To fix this make sure that for multi-link setups the sync port is a vector
port with the width equal to the number of links.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-09-10 13:46:38 +02:00
Adrian Costina 0e8515a90b fmcomms2:kcu105: Performance_ExploreWithRemap fixes DDR timing violation 2018-09-05 15:53:36 +03:00
Adrian Costina 240b75cc45 fmcadc2: VC707, specifically connect spi_csn[2:0] to the fmcadc2_spi module 2018-09-05 15:53:18 +03:00