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2643 Commits (b36c722ec9f9f26249aff71c1e9e66b589780c8a)

Author SHA1 Message Date
AndreiGrozav b36c722ec9 up_hdmi_tx: Discard the standard default values 
Restore the base functionality of the core. Changing the data format
will not set by default its standard maximum and minimum data clipping
ranges.
 2016-05-05 13:41:46 +03:00
AndreiGrozav 68d83def01 axi_hdmi_tx_core: Fixed data path 2016-05-05 13:32:25 +03:00
AndreiGrozav 0d2dc2c62b axi_hdmi_tx: Fixed data bus width 2016-05-05 13:26:59 +03:00
Istvan Csomortani 4863a04132 axi_adc/dacfifo: Split the intergration script file 
Split the integration script file into two separate script files. Rename the
integration processes names to be more meaningful.
 2016-05-05 09:53:55 +03:00
Rejeesh Kutty ddfaff2cf5 fmcomms2/a10soc: compile version 2016-05-04 13:42:12 -04:00
Rejeesh Kutty f4e5965936 fmcomms2/a10soc: ip updates 2016-05-04 13:42:12 -04:00
Rejeesh Kutty 92dcce1674 a10soc: default ports 2016-05-04 13:42:12 -04:00
Rejeesh Kutty bdfa383622 library/axi_ad9361: tdd false paths 2016-05-04 13:42:12 -04:00
Rejeesh Kutty ef6c99ecab library/axi_ad9361: hw component updates 2016-05-04 13:42:12 -04:00
Rejeesh Kutty 3b5e44e37d library/axi_ad9361: mmcm rst for plls 2016-05-04 13:42:12 -04:00
Rejeesh Kutty 16a13b2023 library/axi_ad9361: add rst/locked to clock 2016-05-04 13:42:11 -04:00
Rejeesh Kutty 1aac44b0d9 library: ad_*clk- rst/locked 2016-05-04 13:42:11 -04:00
Rejeesh Kutty d82ca5dc3c library/common- altera variations 2016-05-04 13:42:11 -04:00
AndreiGrozav be74db656c ad6674evb, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1: 
Update system_project.tcl scripts to correctly select the necessary
constraint files
 2016-05-04 19:37:33 +03:00
AndreiGrozav b6b68e9ab7 axi_jesd_gt: Split the constraint file 
-split axi_jesd_gt_constr.xdc file in rx, tx and common constraint files
-updated tcl script
 2016-05-04 19:32:06 +03:00
AndreiGrozav 3ca3414522 fmcadc2: Fixed bus data width 2016-05-04 19:20:01 +03:00
AndreiGrozav 9104b2cc60 ad6676evb, fmcadc2, fmcadc4, fmcadc5,... 
ad6676evb, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1: Remove unused
set_proprieties
 2016-05-04 19:13:25 +03:00
Rejeesh Kutty 385ed31a45 make files update 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 3f5e1e1203 ad9361- dev_if module name change 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 61b531b1c1 a10soc device update 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 89f5d2394e altera- clock variations 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 243d3e6e41 ad9361- a10soc sdc files 2016-04-29 10:17:35 -04:00
Rejeesh Kutty aa2aa902bf ad9361- a10soc updates 2016-04-29 10:17:35 -04:00
Rejeesh Kutty f411d29e30 ad9361- a10soc changes 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 3563c2212c common/altera- removed dcfilt/mul 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 0260280db1 common/altera- data path 2016-04-29 10:17:35 -04:00
Rejeesh Kutty ed62101308 common/altera: primitives 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 779d014750 ad9361-common alt/xil interface 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 664ea16a0f ccpci- carrier changes 2016-04-27 16:26:11 -04:00
Rejeesh Kutty e790e4c3ae a10soc- complete qsys 2016-04-25 12:56:19 -04:00
Rejeesh Kutty bfa6fe2a40 a10soc- updates 2016-04-25 11:23:16 -04:00
Rejeesh Kutty 28159aeec9 a10soc- updates 2016-04-25 11:11:46 -04:00
Rejeesh Kutty 0a3967b886 a10soc- updates 2016-04-25 10:53:26 -04:00
Rejeesh Kutty d36d1263c5 a10soc- updates 2016-04-25 10:50:09 -04:00
Rejeesh Kutty 2a5f31d26b fmcomms2/a10soc- copy 2016-04-22 15:15:44 -04:00
Rejeesh Kutty 82c4f75f13 a10soc- a10gx copy 2016-04-22 10:39:21 -04:00
Rejeesh Kutty 7a4a7edfba daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:07:41 -04:00
Rejeesh Kutty e00236e5fd daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:04:46 -04:00
Rejeesh Kutty 8b2542b181 daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:01:12 -04:00
Rejeesh Kutty e9b199959a library/adcfifo- constraints update 2016-04-20 15:57:25 -04:00
AndreiGrozav 679d471d75 Merge branch 'hdl_2016_r1' into dev 
hdl_2016_r1 contains IP core upgrades to Vivado 2015.4.2 and hdmi_tx improvements.
 2016-04-19 18:05:50 +03:00
Adrian Costina 402253d308 usb_fx3: Updated design to include the GPIF II interface 2016-04-19 15:52:30 +03:00
Adrian Costina d7d8b2cf1c axi_usb_fx3: Integrated actual GPIF II interface, with 2 address lines 2016-04-19 14:38:26 +03:00
Istvan Csomortani 8a574cd8ba zc706_system_plddr3.tcl : Add integration process for the AXI_DAC_FIFO 2016-04-19 11:30:52 +03:00
Istvan Csomortani e855ef38f4 axi_dacfifo: Initial commit 
AXI DAC fifo, which use the PL side DDR memory. The minimum data granularity is 1kbyte.
 2016-04-19 11:28:33 +03:00
Istvan Csomortani 42cd05ab19 ad_mem_asym: Add support for more ratios. 
Supported ratios: 1:1/1:2/1:4/1:8/2:1/4:1/8:1
 2016-04-19 11:18:30 +03:00
AndreiGrozav c291f8f107 daq1: Updated design to 2015.4 2016-04-14 23:36:47 +03:00
AndreiGrozav 469b4ea5e8 fmcadc5: Updated design to 2015.4 2016-04-14 23:18:23 +03:00
AndreiGrozav 62bd057106 fmcadc5/common: Update common design to 2015.4 2016-04-14 23:01:38 +03:00
AndreiGrozav 6fe41ebb08 axi_hdmi_tx: Upgrade hdmi clipping process 
-added two registers that control the clipping ranges (0x01a and 0x01b)
-extend clipping process for all output data formats
 2016-04-12 22:01:07 +03:00