All the hdl (verilog and vhdl) source files were updated. If a file did not
have any license, it was added into it. Files, which were generated by
a tool (like Matlab) or were took over from other source (like opencores.org),
were unchanged.
New license looks as follows:
Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
Each core or library found in this collection may have its own licensing terms.
The user should keep this in in mind while exploring these cores.
Redistribution and use in source and binary forms,
with or without modification of this file, are permitted under the terms of either
(at the option of the user):
1. The GNU General Public License version 2 as published by the
Free Software Foundation, which can be found in the top level directory, or at:
https://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html
OR
2. An ADI specific BSD license as noted in the top level directory, or on-line at:
https://github.com/analogdevicesinc/hdl/blob/dev/LICENSE
Depending on the configuration of the clock source type of the input clock
the clocking wizard will instantiate all kinds of buffers on the input
clock signal.
For these particular projects there is no need to add any kind of buffer
since the source is already coming from a global clock buffer. So set the
configuration accordingly.
Avoids the following warning:
[Opt 31-32] Removing redundant IBUF since it is not being driven by a
top-level port. i_system_wrapper/system_i/sys_audio_clkgen/inst/clkin1_ibufg
Resolution: The tool has removed redundant IBUF. To resolve this
warning, check for redundant IBUF in the input design.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
There is no need for the audio clock to be phase aligned to its source
clock. When phase alignment is disabled the MMCM uses an internal feedback
path without requiring external resources, so disable it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Instead of manually specifying the input clock frequency let the core infer
it automatically. This makes it more straight forward to change the clock
frequency.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
There is a bug in the ps7 component specification that causes critical
warnings to appear in the build log if DMA interface 0 is disabled, but any
other DMA interface is enabled.
Work around this issue by using DMA interface 0 and 1 instead of 1 and 2
for the I2S DMA.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Rejeesh Kutty
Istvan Csomortani
AndreiGrozav
Lars-Peter Clausen
Adrian Costina
István Csomortáni