4 Commits (bd6c76f4abf8be5a6a664078b9d662b6fec736f3)

Author	SHA1	Message	Date
Lars-Peter Clausen	558f2e89af	imageon: zc706: Fix ddr and fixed_io signal names ... The toplevel input/output signal names are lower case, but the signals connected to the system_wrapper are upper case. Since verilog is case sensitive this leaves the toplevel input/output signals unconnected. Fix this by using lower case names everywhere. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>	2015-04-23 14:33:47 +02:00
Rejeesh Kutty	754f11e0e6	imageon: updates	2015-03-24 15:08:48 -04:00
Istvan Csomortani	43673f6b9d	imageon_zc706: Update the project to the new framework	2015-03-23 12:45:34 +02:00
Istvan Csomortani	a170ebfb82	imageon: Initial commit ... Initial commit of the IMAGEON project for ZC706. NOT tested.	2015-01-08 17:01:22 +02:00