ebae8bf8c1
Remove interrupts from system_top for all xilinx projects
...
- remove interrupts from system_top
- for all suported carriers:
- remove all interrupt bd pins
- connect to GND all initial unconnected interrupt pins
- update ad_cpu_interrupt procedure to disconnect a interrupt from GND
before connectiong it to another pin.
2018-08-10 10:10:58 +03:00
bcba21da71
zcu102: updated IOSTANDARD of Bank 44 IOs to match VCCO 3.3V
2018-06-05 08:52:50 +01:00
b7ce81686a
common/zcu102: Fix ps8 ref clock 0 frequency assignament
2017-08-22 15:37:59 +03:00
41e247d426
common/zcu102: Add gpio_t connections
2017-08-22 15:37:59 +03:00
2d64d43475
ZCU102: SPI assign chip selects individually
...
Otherwise, Vivado 2016.4 sets all of the CSNs equal to CSN0. This fix is needed to get the FMCOMMS5 working properly on the ZCU102 (#36 )
2017-07-21 09:22:10 +01:00
f3959cb5b9
zcu102- 2016.4 updates
2017-05-18 14:17:20 -04:00
f0bc3e20ef
zcu102: Automatic IP version update fix
2017-05-02 12:52:43 +03:00
cd8f4f23be
zcu102: Automatic IP version update
2017-05-02 12:30:00 +03:00
c39ed08edd
zcu102/*- actual clock == desired clock
2017-02-06 12:53:47 -05:00
721ee98a06
zcu102- misc fixes
2016-10-06 10:18:14 -04:00
baabe20766
common/zcu102- spi connections & clock
2016-10-05 14:01:59 -04:00
9afff7ae60
common/zcu102- 2016.2 updates
2016-09-30 11:55:10 -04:00
f3f5353944
zcu102- updates
2016-05-10 15:40:41 -04:00
e8fbdd0f5d
zcu102: zynq ultrascale
2016-05-10 15:40:41 -04:00
AndreiGrozav
Laszlo Nagy
Nick Pillitteri
Rejeesh Kutty