zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
6,516 Commits
1 Branch
0 Tags
23 MiB
Commit Graph

3 Commits (be0e2809e9b9facc137f74782e6282b0d54796ef)

Author SHA1 Message Date
Iulia Moldovan db94628cc6 library & projects: Update Makefiles 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-01-27 11:54:05 +02:00
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Istvan Csomortani 0e7b38ebcf axi_pulse_gen: Initial commit 
The axi_pulse_gen is a generic PWM generator, which can be configured
through an AXI Memory Mapped interface.

The current register map look like follows:

  0x00 - VERSION
  0x04 - ID
  0x08 - SCRATCH
  0x0C - IDENTIFICATION - 0x504c5347 which stands for 'PLSG' in ASCII
  0x10 - CONFIGURATION - contains reset and load bits
  0x14 - PULSE_PERIOD
  0x18 - PULSE_WIDTH

Also update all the other modules, which instantiate the util_pulse_gen.
 2019-03-20 08:21:22 +00:00