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8 Commits (c1c6787b912aead949aa19bf07e0c57bf7803596)

Author SHA1 Message Date
Adrian Costina bc04e5a4ce axi_i2s_adi: Fixed pins directions 2015-03-12 17:22:52 +02:00
Lars-Peter Clausen 0b587e6fb1 axi_i2s: Add missing signals to the regmap read process sensitivity list 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:56 +03:00
Lars-Peter Clausen cf2bbf66b7 axi_i2s: Set unused signals to 0 
Fixes warnings from the tools about undriven signals.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:25:51 +03:00
Lars-Peter Clausen 61be003017 axi_i2s/axi_spdif: Create clock and reset interface for DMA bus 
This avoids some critical warnings from Vivado that the DMA bus does not has any associated clocks.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:11:41 +03:00
Lars-Peter Clausen a31cb6c475 axi_i2s/axi_spdif: Remove manual creation of Streaming AXI bus 
It looks like Vivado is now able to infer these buses from the sources.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-10 16:11:06 +03:00
Lars-Peter Clausen 41cc92ef49 Remove BASEADDR/HIGHADDR parameters 
This is unused and unneeded. The AXI interconnect will make sure that a
peripheral only gets requests that are meant for it, there is no need to
check the address in the peripheral itself.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-09-11 12:26:37 +02:00
Rejeesh Kutty 63bd2b870a pointers to directories 2014-02-28 16:58:30 -05:00
Rejeesh Kutty f7c9368abc initial checkin 2014-02-28 14:26:22 -05:00