Commit Graph

17 Commits (c2754429c1bf5e6b4e61d5c995a50eeb55c90671)

Author SHA1 Message Date
Iulia Moldovan 68461110aa Replace link in license header from master to main
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2024-01-16 16:48:45 +02:00
Iulia Moldovan c9a7d4d927 Add copyright and license to .tcl, .ttcl files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 15:22:26 +03:00
Iulia Moldovan 28c06d505f Add/edit copyright and license for .v, .sv files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-11 15:17:41 +03:00
Iulia Moldovan 961ebe0cc2 projects: Update .v files according to guideline
Deleted lines after endmodule and consecutive empty lines.
Modified parentheses, extra spaces.
Fixed indentation.
Fixed parameters list to be each parameter on its line.

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-06-28 18:06:56 +03:00
David Winter 796af696da ad_fmclidar1_ebz: Remove invalid ad_connect invocations
This commit removes two invalid ad_connect invocations, which weren't
caught in the original tests for commit cdda184007.

Signed-off-by: David Winter <david.winter@analog.com>
2021-07-22 15:02:25 +03:00
Laszlo Nagy 3f2f88ebbc ad_fmclidar1_ebz: Set bits per sample towards the DMA interface 2021-02-05 15:24:15 +02:00
Istvan Csomortani 522aacf6d8 ad_fmclidar1_ebz/a10soc: Fix AFE's I2C interface
The AFE's I2C interface should be pin-multiplexed to the FPGA. Also, add
a bidirectional IO buffer for the interface, and make sure it has weak
pull-up resistors.
2020-03-17 07:27:49 +00:00
Istvan Csomortani fde79a2272 ad_fmclidar1_ebz: Fix AFE's SPI polarity 2020-03-10 16:37:18 +00:00
Istvan Csomortani 2cabf8d224 ad_fmclidar1_ebz: Move afe_iic definition to system_bd.tcl
In order to prevent platform specific variable usage in the common tcl
script, move the AFE I2C interface definition to system_bd.tcl
2019-10-17 09:59:23 +03:00
Istvan Csomortani 2344778dd8 ad_fmclidar1_ebz/a10soc: Initial commit
Add initial support for Arria 10 SOC carrier.
2019-10-02 15:32:17 +03:00
Istvan Csomortani 16a797198f ad_fmclidar1_ebz/common: Fix m_dest_axi_aresetn source 2019-08-29 08:59:56 +03:00
Istvan Csomortani 78815435d2 ad_fmclidar1_ebz/common: Connect adc_dovf to GND 2019-08-29 08:59:56 +03:00
Istvan Csomortani d43e6ee239 axi_laser_driver: TIA's are controlled individually in manual mode
Update the sequencer, so the TIA channel selection can be controlled separately
for each TIA, when the sequencer runs in manual mode.
2019-08-08 14:26:07 +03:00
Istvan Csomortani 3290838743 ad_fmclidar1_ebz: Add a dummy ADC channel with TIA channel info
Software has to know which TIA channel was used for a particular capture.
Define an additional dummy ADC channel which will provide this
information. Currently this channel is always enabled.
2019-08-08 14:26:07 +03:00
Istvan Csomortani d096b8f6f4 ad_fmclidar1_ebz: Move the util_axis_syncgen into common direcotry 2019-08-08 14:26:07 +03:00
Istvan Csomortani ea18636586 ad_fmclidar1_ebz: Connect the TIA sequencer to the GPIOs 2019-08-08 14:26:07 +03:00
Istvan Csomortani 21bbc900c8 ad_fmclidar1_ebz: Initial commit
This commit was created by squashing the following commits, these
messages were kept just for sake of history:

  ad9694_500ebz: Mirror the SPI interface to FMCB
  ad9694_500ebz: Set transceiver reference clock to 250
  ad9694_500ebz: Allow to configure number of lanes, number of converters
                 and sample rate
  axi_ad9694: Fix number of lanes, it must be 2
  ad9694_500ebz: Update the mirrored spi pin assignments
  ad9694_500ebz: Gate SPI MISO signals based on chip-select
  ad9694_500ebz: Set channel pack sample width
  ad9694_500ebz: Change reference clock location
  ad9694_500ebz: Remove transceiver memory map arbitration
  ad9694_500ebz: Ensure ADC FIFO DMA_DATA_WIDTH is not larger ADC_DATA_WIDTH
  ad9694_500ebz: Adjust breakout board pin locations
  ad_fmclidar1_ebz: Rename the ad9694_500ebz project
  ad_fmclidar1_ebz: Fix lane mapping
  ad_fmclidar1_ebz: Delete deprecated files
  ad_fmclidar1_ebz: Integrate the axi_laser_driver into the design
  ad_fmclidar1_ebz: OTW is an active low signal
  ad_fmclidar1_ebz: zc706: Fix iic_dac signals assignment
  ad_fmclidar1_ebz: Switch to util_adcfifo
  ad_fmclidar1_ebz: Enable synced capture for the fifo
  ad_fmclidar1_ebz/zc706: Enable CAPTURE_TILL_FULL
  ad_fmclidar1_ebz/zc706: Reduce FIFO size to 2kB
  ad_fmclidar1_ebz: Laser driver runs on ADC's core clock
  ad_fmclidar1_ebz_bd: Delete the FIFO instance

     Because the DMA transfers are going to be relatively small (< 2kbyte),
     the DMA can handle the data rate, even when the frequency of the laser
     driver pulse is set to its maximum value. (200 kHz)

     The synchronization will be done by connecting the generated pulse to
     the DMA's SYNC input. Although, to support 2 or 1 channel scenarios, we
     need to use the util_axis_syncgen module to make sure that the DMA
     catches the pulse, in cases when the pulse width is too narrow. (SYNC is
     captures when valid and ready is asserted)

     Also we have to reset the cpack IP before each pulse, to keep the DMA buffer's
     relative starting point in time fixed, when only 2 or 1 channel is
     active.
2019-08-08 14:26:07 +03:00