Commit Graph

9 Commits (c3aa014105f4ded0b9887c88b8fe5834dbc47218)

Author SHA1 Message Date
Iulia Moldovan 28c06d505f Add/edit copyright and license for .v, .sv files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-11 15:17:41 +03:00
Iulia Moldovan 0c0617d49e libraries: Update modules according to guideline
* Added header license for the files that didn't have
* Modified parentheses
* Removed extra spaces at the end of lines
* Fixed parameters list to be each parameter on its line
* Deleted lines after endmodule and consecutive empty lines
* Fixed indentation

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-06-28 18:06:56 +03:00
Istvan Csomortani f7b8a2dfb5 axi_dmac: Update IP with the new util_axis_fifo
Update instantiation, false path definitions and make file.
2020-12-04 11:00:53 +02:00
Istvan Csomortani 70b7d69ff8 whitespace: Delete all trailing white spaces 2019-06-07 10:20:15 +03:00
Laszlo Nagy 5e1100ee77 axi_dmac: patch for partial 2D transfer support
This patch addresses the following issue:

  In 2D mode when consecutive partial transfers occur, and the latter is
very short, will interfere with the completion mechanism of the first
transfer leading to uncompleted segments and unreported partial
transfers.
2019-05-24 11:11:08 +03:00
Lars-Peter Clausen 34e89b9e39 axi_dmac: burst_memory: Reset beat counter at the end of each burst
This simplifies the burst length in the response manager significantly
while not costing much extra resources in the burst memory.

This change will also enable other future improvements.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-11-30 23:41:49 +02:00
Lars-Peter Clausen d72fac4b1e Add missing timescale annotations
For consistent simulation behavior it is recommended to annotate all source
files with a timescale. Add it to those where it is currently missing.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-10-17 10:32:47 +03:00
Laszlo Nagy a1cc20e3b9 axi_dmac: early abort support
Data mover/ src axis changes
  Request rewind ID if TLAST received during non-last burst
  Consume (ignore) descriptors until last segment received
  Block descriptors towards destination until last segment received

Request generator changes
  Rewind the burst ID if rewind request received
  Consume (ignore) descriptors until last segment received
  If TLAST happened on last segment replay next transfer (in progress or
   completed) with the adjusted ID
  Create completion requests for ignored segments

Response generator changes
  Track requests
  Complete segments which got ignored
2018-09-07 11:38:04 +03:00
Laszlo Nagy eb40b42c88 axi_dmac: preparation work for reporting length of partial transfers
Length of partial transfers are stored in a queue for SW reads.
The presence of partial transfer is indicated by a status bit.

The reporting can be enabled by a control bit.

The progress of any transfer can be followed by a debug register.
2018-09-07 11:38:04 +03:00