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21 Commits (c8a095f79cd807e69ec8ac01f33ca6ca30e88509)

Author SHA1 Message Date
Lars-Peter Clausen c372064302 Add .gitattributes file 
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-07-01 18:43:51 +02:00
Rejeesh Kutty f9ffaf457d projects/daq2- drp moved to up clock 2015-06-01 13:39:26 -04:00
Lars-Peter Clausen 1d66cf63b6 common: zc706: Use interface connection for the HDMI DMA stream 
Use a interface connection for the HDMI DMA stream instead of individually
connecting each of the signals. This make things a bit cleaner.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-04-08 13:29:25 +02:00
Istvan Csomortani 68361bafd4 zc706_base: The FCLK_CLK2 is not used. 2015-03-11 18:10:32 +02:00
Rejeesh Kutty 8967903d76 zc706: intr sensitivity level-high 2015-03-10 16:05:05 -04:00
Rejeesh Kutty 031dffa80c zc706: move gpio/spi to base design 2015-03-09 16:07:02 -04:00
Rejeesh Kutty 91765fdd82 daq2+base: board tcl updates 2015-03-05 10:56:36 -05:00
Rejeesh Kutty 0de1a38245 zc706: 2014.4 update 2014-12-23 14:03:52 -05:00
Rejeesh Kutty 2e01ad2eec ad9625_fmc/zc706: ps7 interrupt updates 2014-10-29 12:13:44 -04:00
Istvan Csomortani a870603db5 common_bd: Update the common block designs to the new IRQ path 
Avoid the use of xil_concat module by using the ad_interrupts.
 2014-10-27 19:44:25 +02:00
Istvan Csomortani 767179dce9 adv7511_zc706: Fix IRQ layout 
Fix IRQ connection, this layout works on Linux
 2014-10-21 17:44:28 +03:00
Lars-Peter Clausen 7d3be14ab5 common: Connect audio clkgen reset 
While we are at it also hide the unused locked pin.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-15 18:44:46 +03:00
Lars-Peter Clausen fd89458708 common: Set cpu interconnect strategy to minimize area 
There will rarely be concurrent access to the peripheral control bus
interconnect, so there is no need to optimize for performace. Setting the
interconnect strategy to minimize area can reduce the resource usage by
~90%.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-10-15 18:43:54 +03:00
Lars-Peter Clausen 43e9b0c7a6 common: Disable TTC0 MMIO routing for PS7 
We do not use the ttc0 to MMIO routing, but it is enabled by default, so
explicitly disable it.
 2014-10-10 16:19:51 +03:00
Istvan Csomortani dd7bac41c1 daq1 : Update project to 2014.2 
- Cores are upadted
  - Concat module does not swap output anymore
  - Clock signal name ps7_clk_* changed to clk_fpga_*
 2014-09-22 17:33:50 +03:00
Lars-Peter Clausen 41cc92ef49 Remove BASEADDR/HIGHADDR parameters 
This is unused and unneeded. The AXI interconnect will make sure that a
peripheral only gets requests that are meant for it, there is no need to
check the address in the peripheral itself.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-09-11 12:26:37 +02:00
Istvan Csomortani f9a67371c0 Zynq Base System: Reset is synchronized to lowest system clock 
System reset (sys_100m_reset) is synchronized to lowest system
	clock (FCLK0), via a Processor System Reset module
 2014-03-26 17:58:14 +02:00
Rejeesh Kutty dc44703cf1 zynq/non-zynq: identical signal names and instances 2014-03-17 17:02:03 -04:00
Rejeesh Kutty a6da4ca01c zynq/non-zynq merge variables 2014-03-17 16:39:52 -04:00
Rejeesh Kutty f3ae57a53e global clock and reset names 2014-03-11 09:57:59 -04:00
Rejeesh Kutty ddac1a8834 added common board files 2014-02-28 21:17:01 -05:00