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5 Commits (c8a095f79cd807e69ec8ac01f33ca6ca30e88509)

Author SHA1 Message Date
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Istvan Csomortani 15618c9edf daq2 : Integrate the DACFIFO into the supported projects. 
+ All pack/unpack logic is made by the cpack and upack modules.
+ The DAC FIFO is integrated between the TX DMA and cpack.
+ All the top files are updated, all the projects compiled successfully.
 2015-05-11 12:20:50 +03:00
Rejeesh Kutty cf85f0b0bb daq2/vc707: gpio_bd is 21bits 2015-03-26 14:18:26 -04:00
Rejeesh Kutty 90a8d91c36 daq2/vc707: 2014.4 updates 2015-03-26 14:02:43 -04:00
Istvan Csomortani e1d8dd10a9 daq2: Initial check in of the VC707 based project 
NOTE: Can not communicate with the clock chip, rx/tx PLL not locking.
 2015-01-28 16:24:06 +02:00