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4124 Commits (cf25aeacf5781b1d9eeff138a5c9bc002f028c11)

Author SHA1 Message Date
Lars-Peter Clausen 8a2b29cdbe axi_damc: Add xfer_req to the FIFO source interface 
The xfer_req signal will be high if DMA core the is expecting data.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-07-02 16:05:16 +02:00
Rejeesh Kutty 31abd07613 axi_ad9144: register map changes 2014-07-01 21:43:04 -04:00
Rejeesh Kutty 9a08189b93 c5soc: initial a5soc copy 2014-07-01 13:09:38 -04:00
Rejeesh Kutty c1b7fc17f5 c5soc: initial a5soc copy 2014-07-01 13:05:26 -04:00
Rejeesh Kutty 60dd14bcdb a5soc: removed jtag master control 2014-07-01 12:27:37 -04:00
Rejeesh Kutty b6052773b7 added adc/dac gpio registers 2014-06-27 14:45:58 -04:00
Rejeesh Kutty ba7955c531 fmcomms2: register map modifications 2014-06-26 10:09:03 -04:00
Rejeesh Kutty 4afe6c24e9 Merge branch 'devel' of github.com:analogdevicesinc/hdl into devel 2014-06-25 15:26:21 -04:00
Rejeesh Kutty 10a7804e14 ad9361: altera wrapper updates 2014-06-25 15:26:06 -04:00
Rejeesh Kutty 92e525d573 ad9250: register map updates 2014-06-25 15:24:48 -04:00
Rejeesh Kutty 4fdb3cfc4a ad9250: register map updates 2014-06-25 15:23:57 -04:00
Rejeesh Kutty 4f5d163fcc Merge branch 'master' into devel 2014-06-25 13:07:12 -04:00
Rejeesh Kutty e38813fa9f fifo- monitor status signals 2014-06-25 12:15:13 -04:00
Rejeesh Kutty 57bb3705f2 zc706-plddr3: read changes to lower dma clock 2014-06-25 09:20:58 -04:00
Rejeesh Kutty 4877df9bec axi_fifo2s: make read dead slow 2014-06-25 09:20:57 -04:00
Rejeesh Kutty 985ace533e ad9361: remove unused modules 2014-06-24 14:26:40 -04:00
Rejeesh Kutty 6b3312bbf9 library: register map changes and for mathworks 2014-06-24 14:24:22 -04:00
Rejeesh Kutty d4be46cc17 library: register map changes and for mathworks 2014-06-24 14:23:56 -04:00
Rejeesh Kutty e650253013 library: register map changes and for mathworks 2014-06-24 14:22:05 -04:00
Istvan Csomortani 89961c8dd7 prcfg_lib: Update the PR libraries 
+ Flop the control nets too inside the adc/dac module
  + Flop the gpio_out in prcfg_top
 2014-06-13 20:35:35 +03:00
Istvan Csomortani 3d8d576532 prcfg_script: Update the PR flow script 
+ Make part global
  + No need the Explore directive on implementation
  + Fix some reference to pr module
  + Fix the pr_verify function
 2014-06-13 20:33:59 +03:00
Rejeesh Kutty 7efd6149f8 daq2: initial checkin 2014-06-12 15:54:25 -04:00
Rejeesh Kutty b1b9067512 ad9625x2_fmc: added multi-sync support 2014-06-12 15:45:35 -04:00
Rejeesh Kutty 87bec07a22 ad9625: added multi-sync support 2014-06-12 15:45:34 -04:00
rkutty 5189d200e7 axi_fifo2s: linux fix on interfaces 2014-06-12 15:30:13 -04:00
Rejeesh Kutty 6ea7dd7fc3 kcu105: pwr-good added 2014-06-12 15:22:31 -04:00
Adrian Costina 6e444559b5 usdrx1: global clock fix 2014-06-10 18:09:49 +03:00
Rejeesh Kutty 2d27f88588 ad9625_fmc, ad9625x2_fmc: initial checkin 2014-06-09 16:40:48 -04:00
Rejeesh Kutty 3e5990366e axi_ad9625: initial release 2014-06-09 16:39:08 -04:00
Adrian Costina bef6a9c32c axi_ad9361: Split dma data into individual channels for both ADC and DAC 2014-06-07 17:15:31 +03:00
Adrian Costina 2837d788a6 mitx045: Added I2S core to the base design 2014-06-06 17:53:47 +03:00
Istvan Csomortani bd8d355b05 scripts: Update adi_prcfg_project.tcl 
Define a new parameter for the prcfg_init_workspace process:
  prcfg_name_list.
 2014-06-06 15:00:23 +03:00
Rejeesh Kutty cf56a568c6 kcu105: GTH updates 2014-06-05 14:27:38 -04:00
Istvan Csomortani ea22d29862 prcfg: Initial check in of PR modules 
Initial check in of the partial reconfiguraiton modules.
 2014-06-05 14:58:14 +03:00
Istvan Csomortani f452e40192 scripts: Initial check in of non-project flow 
These processes are used for projects with partial
  reconfiguration. The used design flow in these cases is the
  non-project (batch) design flow.
 2014-06-05 14:33:27 +03:00
Adrian Costina 45325b7c0d mitx045: minor changes in common and ADV7511 projects 2014-06-03 19:24:12 +03:00
Rejeesh Kutty f695a45394 global clock fix 2014-06-03 09:23:23 -04:00
Adrian Costina f217139770 fmcomms2: added project for mini_itx, xc7z045 version 2014-06-02 14:06:10 +03:00
Adrian Costina c52327d0c6 common,adv7511: Added mitx045 platform. 2014-06-02 11:08:03 +03:00
Rejeesh Kutty 877b81a373 ad9625/vc707: working version 2014-05-30 15:07:23 -04:00
Rejeesh Kutty c789dce77e ad9625/zc706: added pl ddr3 fifo changes 2014-05-29 12:59:29 -04:00
Rejeesh Kutty 5b5bca400f ad9361: added adc loopback 2014-05-27 14:47:59 -04:00
Rejeesh Kutty 842cd98b61 ad9361: adc loopback option 2014-05-27 12:15:02 -04:00
Rejeesh Kutty 56ddce1e8c dmac: create fifo interface to avoid being treated as axi control stream 2014-05-27 10:25:14 -04:00
Rejeesh Kutty 0cd43e34f5 dds: zero scale fix 2014-05-21 11:54:49 -04:00
Istvan Csomortani 1d53d79e25 fmcomms2/common: Fix ad9361's interface 
Loopback the l_clk to clk. l_clk is the device sampling clock, clk is used to
    synchronize the cores in case of a multiple device configuration.
 2014-05-21 10:09:54 +03:00
Istvan Csomortani 25e4520726 fmcomms2/common: Delet trailing white spaces 2014-05-21 09:47:37 +03:00
Rejeesh Kutty bab90a19c2 fmcomms5/zc702: removed unused ila cores 2014-05-20 14:42:48 -04:00
Rejeesh Kutty 7e6b4ea9d0 fmcomms5: ignore only common clock to external clocks 2014-05-19 20:38:41 -04:00
Rejeesh Kutty 916afd460f axi_jesd_gt: synchronization support 2014-05-19 14:17:31 -04:00