Commit Graph

2466 Commits (d1e638349b129d324b4f15e7b99a3084cfbace0b)

Author SHA1 Message Date
Istvan Csomortani d1e638349b ad_serdes_clk : The reference clock selection line should by tied to 1
Just the CLKIN1 is used in the MMCM.
2016-01-19 11:18:00 +02:00
Istvan Csomortani c6cfd1a2b6 axi_ad9684: Initial check in 2016-01-19 11:13:45 +02:00
István Csomortáni ab99c4456a ad9434_fmc: Delete unnecessary set_property call
HPx interface is activated by the ad_mem_hpx_interconnect process
2016-01-14 15:41:23 +02:00
Lars-Peter Clausen c094ab8b52 cn0363: Add support for the MicroZed
Add support for connecting the CN0363 to the MicroZed. This works in
combination with the MicroZed Arduino carrier board. The CN0363 needs to be
connected to the PLPMOD header.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Lars-Peter Clausen 514eb68876 cn0363: Factor out common parts
Factor out the common parts of the cn0363 design so we can use it to add
support for other carriers.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Lars-Peter Clausen d2b26720e6 common: microzed: Add clock, reset and interrupt support
In order for the base project to be usable by other projects it needs to
create the clock, reset and interrupt signals that are expected to exist.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Lars-Peter Clausen 51d20b1a61 adi_project.tcl: Add MicroZed support
Handle the projects for the MicroZed and set up the FPGA part accordingly.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Lars-Peter Clausen 426490c394 common: Rename uzed to microzed
Everybody calls the MicroZed microzed in their projects. Don't deviate from
that to avoid potential confusion.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:18:57 +01:00
István Csomortáni 4f2b999999 axi_ad9680: Q_OR_I_N is not used in this channel 2016-01-13 16:26:22 +02:00
István Csomortáni 838b558176 axi_ad9434: Fix adc_status
adc_status was not driven by anything. Should be driven by adc_status_m1.
2016-01-13 12:21:42 +02:00
István Csomortáni 2dcd9136aa axi_ad6676: Delete confusing comment 2016-01-13 10:20:18 +02:00
Rejeesh Kutty c397787001 uzed: updates 2016-01-11 15:36:01 -05:00
Rejeesh Kutty a610ebb413 uzed: zed-copy 2016-01-11 13:53:22 -05:00
Istvan Csomortani 02cc926275 daq1: Add CPLD logic and IO constraints 2016-01-04 18:10:46 +02:00
Rejeesh Kutty 2bb19be3d3 pzsdr/ccfmc: sfp io control 2015-12-17 16:18:06 -05:00
Rejeesh Kutty f3fe16a102 pzsdr/ccfmc: camera/sfp pin changes 2015-12-17 16:17:24 -05:00
Rejeesh Kutty ea045a3f9a fmcadc4: change qpll to receive 2015-12-17 12:34:47 -05:00
Rejeesh Kutty 40ab2f5e6a ccfmc: tdd/gpio bit moved to the top 2015-12-17 11:37:57 -05:00
Rejeesh Kutty 83fd4a53a7 daq3/kcu105: updates 2015-12-14 09:29:48 -05:00
Rejeesh Kutty 07316a905e daq3/a10gx: sysref is lvds 2015-12-14 09:29:10 -05:00
Rejeesh Kutty 6a9d1c431a daq3/a10gx: updated to a10gx/quartus 2015-12-11 12:49:25 -05:00
Rejeesh Kutty 4c2d08a9be ad9152: altera syntax error 2015-12-11 12:49:00 -05:00
Rejeesh Kutty da2e1bdc9a daq2/a10gx: 32bits generic gpio 2015-12-11 11:50:26 -05:00
Rejeesh Kutty 650d426301 a10gx/base: set gpio to 32 2015-12-11 10:14:37 -05:00
Rejeesh Kutty dc84a9ad82 daq3/a10gx: updates 2015-12-10 16:06:14 -05:00
Rejeesh Kutty f1b6577447 a10gx/base: separate gpio in/out 2015-12-10 16:04:54 -05:00
Rejeesh Kutty bc93910ee5 ad9152: qsys updates 2015-12-10 16:04:10 -05:00
Rejeesh Kutty ff1d98a0c7 ad9144: duplicate include 2015-12-10 16:02:35 -05:00
Rejeesh Kutty ce906989d5 ad9152: qsys ip 2015-12-10 09:46:31 -05:00
Rejeesh Kutty d944198212 daq3/a10gx: board updates 2015-12-10 09:45:20 -05:00
Rejeesh Kutty 1a38ea205d daq3/a10gx: copy 2015-12-10 09:42:56 -05:00
Rejeesh Kutty 614babc18e daq3/kcu105: copy 2015-12-10 09:41:47 -05:00
Rejeesh Kutty b0fef1122e daq3/a10gx: copy 2015-12-10 09:41:37 -05:00
Rejeesh Kutty be075379df hdlmake: updates 2015-12-07 13:11:24 -05:00
Rejeesh Kutty 0938041d97 ad7768evb: added 2015-12-07 13:07:03 -05:00
Istvan Csomortani 12c95b059d ad_tdd_control: Remove tdd_enable_synced control line
For a better timing and control, the valid control lines are gated with flops, instead of combinatorial logic.
This is the main reason why we do not need the tdd_enable_synced signal anymore. The out coming data is delayed by one clock cycle to keep data and control lines synced.
2015-12-03 11:16:28 +02:00
Adrian Costina 5cf45b2978 axi_clkgen: Added phase related parameters 2015-12-02 18:50:23 +02:00
Adrian Costina 6e549171f0 fmcomms5: Connected the clk input of the ad9361 to l_clk 2015-12-02 14:43:44 +02:00
Adrian Costina 2309c4d83c Makefiles: Removed " from path 2015-11-27 14:02:46 +02:00
Adrian Costina 159f6c1216 Makefiles: Updated Makefiles
- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
Istvan Csomortani 36febf8591 Merge branch 'master' into dev
Conflicts:
	library/axi_ad9361/axi_ad9361_ip.tcl
	library/axi_dmac/Makefile
	library/axi_dmac/axi_dmac_constr.ttcl
	library/axi_dmac/axi_dmac_ip.tcl
	library/common/ad_tdd_control.v
	projects/daq2/common/daq2_bd.tcl
	projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl
	projects/fmcomms2/zc706pr/system_project.tcl
	projects/fmcomms2/zc706pr/system_top.v
	projects/usdrx1/common/usdrx1_bd.tcl

This merge was made, to recover any forgotten fixes from master,
before creating the new release branch. All conflicts were reviewed
and resolved.
2015-11-26 13:38:11 +02:00
Adrian Costina 667e49fe41 library: Axi_clkgen, added register for controlling the source clock.
Address is 0x11 /0x44.
With the default value, 0, clock 1 is selected. If set to 1, clock 2 is selected
2015-11-25 11:16:32 +02:00
Adrian Costina ea57b3c03c daq2: A10GX, add project specific IP search paths 2015-11-25 10:58:36 +02:00
Adrian Costina df58646925 util_adcfifo: Updated altera interface 2015-11-25 10:20:06 +02:00
Adrian Costina e8a595b81e fmcjesdadc1: Updated a5soc design 2015-11-24 15:39:52 +02:00
Adrian Costina fd3910a915 fmcjesdadc1: Updated a5gt design 2015-11-24 15:39:21 +02:00
Adrian Costina 9281eb2c33 fmcjesdadc1: Updated common altera design 2015-11-24 15:38:58 +02:00
Istvan Csomortani 593c486168 ad_tdd_control: The state machine goes from OFF to ON, when a valid sync is received 2015-11-24 15:15:53 +02:00
Istvan Csomortani c70be7391f ad_tdd_control: Avoid unnecessary reset on control lines
No need to reset for tdd_last_burst, it's value depends on the tdd_burst_counter.
2015-11-24 15:13:18 +02:00
Adrian Costina a81625e1fa daq2: Updated a10gx project 2015-11-24 13:28:53 +02:00